The most common jellybean option to expand those three slave select bits to seven, assuming standard /SS active low logic, I believe is 74xx138, say
NXP 74LVC138A or
NXP 74LV138. If board area is an issue, I'd consider
TI SN74LV138A in 16-WFQN (SN74LV138ABQB, 3.6mm × 2.6mm) or BGA (SN74LV138ANSA, 2mm × 2mm). All of them have a particularly nice layout if you only need six /SS outputs, leaving Y7 floating.
Annoyingly, the SS0, SS1, SS2 outputs would need to be inverted to map the unused command (0x00) to Y7, to get seven slave selects. You can easily do that with say a
NXP 74HC3G14 (or any other 74xx3G14), or with any jellybean hex inverters (one for a pair of '138s). That way, command 0x01 would enable (pull low) Y6, 0x02 Y5, 0x03 Y4, 0x04 Y3, 0x03 Y2, 0x02 Y1, and 0x01 Y0. This is particularly nice, because Y7 is on the address/enable side of the IC, so leaving it the unused one makes for a very clean PCB layout in my opinion.
(Note: I'm only a hobbyist, with a few simple PCB designs, not ready for BGA yet.)
For the current, I read max. 4mA plus the current is sourced or sunk on the outputs (SS0, MOSI, SPICLK, SDA on ACK/NAK). The output currents vary too much –– for example, sometimes very small resistors are added in series to increase the current and the power needed for coupled noise to affect the signals –– to give a reasonable estimate; but if connected directly to a CMOS IC, it would be neglible, less than a milliamps or so (in the tens of microamps range in steady state, maybe a few hundred microamps when changing state).
One "trick" I like to do is a
TI TXU0304 or
TXU0304-Q1 at the peripheral-facing end, to allow for both voltage level translation (if needed) and to move the current draw from the MCU or FPGA to the TXU0304 chip. (I also use
TI ISO7741 for both SPI isolation and level translation, when I don't know exactly what I shall be interfacing to, making it easier for me to avoid current loops and such in my designs. But more experienced members here have tried to convince me using isolators that way is poor design, so beware.)