Could this JFET amplifier work for an HF frequency counter?

[Verdefluox]

It's been a long time since I became interested in HF, and I thought that maybe it could be time to start working on some basic lab equipment. I have a very old CB transceiver and willing to make it work again.
I thought about starting with a frequency counter, which could work also as a general purpouse one (hence, my requirements so far would be say 1 Hz to 30 MHz, and I'm fairly sure I'm not interested in going beyond that maximum). My plan is, at least on the chart, fairly simple: make a small x10 amplifier, then use D flip-flops (I have some 74ACT74 around), divide the fundamental and count the result with an Arduino.
Unfortunately, I don't even have many means of measuring directly HF signals (since my USB scope is useful up to 15 MHz more or less). Hence, half of the requirements are lacking also to me. I guess 100 mV to 10 V levels are enough to make me tinker with typical parts in a simple transceiver?

At the same time, for another work, while studying JFET on "The Art of Electronics" I found this series-feedback pair, and while testing it for understanding purpouses I tinkered it a bit to work up to around 50 MHz, although with just a 10 dB gain (had to trade between the two).
I'm planning to add two of them in a cascade to make a 20 dB (=x10) gain.
Could this work, at least in principle?

Looking at another book for a DIY transceiver, I noticed the construction of the oscillators involves tuning them down to 100's of Hz (example: something like 10.6985 MHz), hence I'm supposing the best I'm looking for is to read like 29.9999 MHz, so 6 digits in total. Is this possible or am I completely out of touch?

P. S. So far I haven't considered input protection and other stuff.

[TimFox]

Remember that two identical amplifiers cascaded will have a lower bandwidth than that of each amplifier.

[Kleinstein]

In principle the JFET amplifier can work. I would still suggest having a schmidt trigger chip like 74AC1G14 between the amplifier and flip flop.

The lower resistors in the simulation file look a lot better than the original plan, that is more made for the audio range.
I have a very similar (different transistors) front end in my DIY counter. I have not tested much beyond 30 MHz though.
A somewhat tricky part is getting the right DC level, as adjustment of the DC level also effects the gain and the threshold of JFETs scatters quite a bit.
In my case the amplifier behaves reasonable well with an overdriving signal.

If more gain is wanted / needed from a 2nd stage, one may get away with a NPN based stage, that is more predictable in the offset.

For a frequency counter it is no problem to get 6 digit resolution. The accuracy still depends on the clock, but additional resolution may still be useful beyond the accuracy.  I would suggest a canned oscillator (maybe the option for a TCXO) and not a bare crystal at the µC, as this is more prone to interference effecting the frequency. It is more that one may wants more than only 6 digits, as the AVR as reciprocal counter can easy get 7 digits (1E7 counts) with 1 second counting.  For the display even 8 digits makes sense, as the leading digit can be a 1, e.g. with a frequency just a bit over 1 MHz.

[Verdefluox]

If more gain is wanted / needed from a 2nd stage, one may get away with a NPN based stage, that is more predictable in the offset.

I tried the following: a simple NPN amplifier based on some rough calculation, but with R11 and C4 made just to keep the BW in the highest frequency part (NOTE: I'm showing you that gain peak for explanatory purpouses, I'm gonna make it flat by tweaking their value later). Can this make sense, since with this I'm getting already 20 dB?

I would still suggest having a schmidt trigger chip like 74AC1G14 between the amplifier and flip flop.

May I ask you more about this? Why the flip flop I suggested can't be attached directly?
Mind that now my problem shift to the following: convert the sine into a square and divide it the first time. Then the rest is trivial. But I have no clue about how to treat the impedances on the hex inverter/flip flop and getting a right level for the input (as far as I know these digital components usually work with 5V). A comparator could have worked, but I'm not finding something *that* fast easily.

[Kleinstein]

The 74ACT74 and many normal logic gates are not made to work with a signal somewhere in the middle. They are made for defined logic levels with relatively fast transitions. The schmidt trigger gates like the 74xx14 is kind of a comparator with a fixed hysteresis and made to handle in between signals or slowly changing signals.

A few chips have a schmidt trigger function also with other chips, but the 74ACT74 seems to be not one of those.
 
There data sheets usually give the input impedance for the logic gates. Some 4-5 pF and maybe a few more pF from the layout.

[David Hess]

Amplifiers intended for frequency counter inputs should be designed to handle overload gracefully without delays caused by saturation or cutoff.  Up through HF frequencies, a fast comparator like an LT1016 or a differential input line receiver is a simple way to do it.

Old discrete design use a JFET follower, followed by some combination of single transistor transconductance stages or differential stages because they handle overload without delays.  Shunt or series feedback may cause problems with overload recovery.  Differential pairs can be clamped to handle overload and may include hysteresis like a Schmitt trigger.  A later discrete design used an FET differential pair for the input, which directly drives a series of ECL 10216 differential amplifiers in series operating like limiting amplifiers.  This is a lot like an FM IF receiver chain which uses limiting amplifiers.

For a new design, I might do something like the two examples shown below from Linear Technology application note 47.  A high impedance buffer could be added at the start of either circuit.