Hello,
I am trying to build the circuit from a Tektronix magazine for a CCD image sensor (Sony ICX415AQ 50 frames per second still camera).
https://vintagetek.org/wp-content/uploads/2019/04/IntroToCCDs_Feb1987.pdf is the full article
So regarding the first circuit, the "pre-amplifier", do I understand correctly that the opamp inputs due to ideal opamp rule V+=V- are forcing the pnp dual BJT collector currents to be equal. By this fact and the fact that the CCD output voltage changes the current in the JFET channel, CCD output voltage will force the opamp also to produce output current big enough to make the voltage at the 1.96K/90.9Ohm divider equal to the CCD voltage. Therefore, Vout is 1.96K/90.9=21.56 times the CCD output voltage.
The amplifier presented is HA2520 the JFET input stage opamp. But instead another JFET input stage is added and in a configuration I see for the first time: all elements and especially the op amp are powered not directly to the +-15V rail but instead through a <=100 ohm resistor. But I still do see a lot of pulling action going on even through the series resistors on voltage sources.
So I have two concerns here:
1) What are the lantern-looking circuit symbols on the second screenshot, at the "post-amp" input and at the A to D buffer output?
2) What could be a reasonable replacement for a slow CD4053 analog switch (for the 29.5MHz or 34ns pixel time to make both charge transfer operations and feed it to a 30MHz ADS930E)
I have a fast switching Toshiba 2SC4250 npn bjt transistor at hand but the 0.1V Vce(sat) doesn't make a good single-throw (12,13,14) and even worse for the double-throw switch (3,4,5)