Compact 74AC14 pulse generator PCB

[rfmerrill]

A lot of people have seen showing a fast edge pulse generator made with a 74AC14 and a few resistors and caps.

I built the circuit up on a piece of copper clad but decided it was a bit too fragile and decided to make a small PCB.



Unlike some of the other PCBs people have made, I decided to go with fairly small SMT passives for this to keep the signal length short and the overall size small. I also made it for an SMA connector as I have more SMA parts than BNC (which is the more popular choice). I still used the DIP version of the 74AC14 because I already had a bunch on hand and I don't know how much benefit there is to using the SMT versions--you would need to add vias anyway.



I don't have a very high bandwidth scope but the rise time I see approaches the limit of what my scope can measure, so I think it works pretty well. Just like the deadbugged version I made, you do see a lot of ringing, but this isn't meant to be a perfect circuit.

OSH park share link: https://oshpark.com/shared_projects/205KQbDA

KiCAD project is attached

[rfmerrill]

One potential improvement I'm aware of is that C1 and the VCC pour should probably have gone on the top, as it gives a better decoupling path--you can implement this as a rework easily by removing solder mask on the top and using a wire. The thermal reliefs were left at their default and I think for this size board they're overkill and could even be eliminated.

[MikeK]

Looks good.  I think the surface mount package would have a shorter rise time.

[MarkF]

Here is what I did:

https://www.eevblog.com/forum/beginners/is-this-standard-tolerance-for-square-wave-generator-output/msg3368814/#msg3368814

waveform:

https://www.eevblog.com/forum/beginners/is-this-standard-tolerance-for-square-wave-generator-output/msg3372374/#msg3372374

Mine is much larger though with through-hole parts.
I also use it as a buffer/driver with the jumper to select the external input instead of the pulse generator.

[magic]

compact

Been there, done that, got the t-shirt. I willy try to photograph my build later today, you will like it

The biggest limitation of those devices is power supply ESL. It's the origin of that 60MHz ringing and I solved it by using the tiny 74LVC2G14 chip and mounting bypass capacitors right on top of the package between its supply pins. Another problem is inductance of power cables, I found that it takes 47µF to suppress ringing at some kHz which shows up if you slow down repetition frequency.

My result looks like below. I have a strong suspicion that the slow rise over 20ns is some sort of artifact of the Chinese DSO because it just doesn't make any sense to me otherwise. Besides that, there is only a bit of overshoot which settles down after 4ns and this too could be partly to blame on the scope.

The gray trace is a reference I saved long ago.

edit
And here's the post which gave the the idea of using small LVC gates:
https://www.mikrocontroller.net/topic/217945#2205244

[MikeK]

Would be nice if this had variable pulse width and period.

[rfmerrill]

I'm kind of a beginner to high speed stuff: With using 7414 type drivers, is there any point to length-matching the traces from the driver to the output?

[magic]

Probably not much. Propagation velocity is on the order of 20cm/ns.

Would be nice if this had variable pulse width and period.

Replace R1 with a pot and you can control width and period, but not duty cycle

And this is my "compact" build. As you see, I went a little nuts with minimization

[MikeK]

And this is my "compact" build. As you see, I went a little nuts with minimization

I like it.  Always good to have less things in the way, or break off.

[MarkF]

I spun a compact version of my Pulse Gen loosely based on @rfmerrill's layout.

[magic]

The path through decoupling caps is easily twice what it needs to be. OP's is much better, though C1 could go to the top layer.
It could be further reduced with little effort by switching to the SO14 package.

Remember about RDS(on) of the outputs, you can't just put 4×200Ω and expect correct termination.

edit
I found my old prototype built with 74AC14 in SO14. Apparently due to 50% decoupling ESL reduction, ringing goes from 120MHz to 250MHz and decays after 12ns. I used crappy carbon film resistors for that, perhaps SMD could be a little different in terms of rise time and overshoot.

It also looks like five parallel 220Ω isn't exactly the correct termination either, because amplitude is too high.

[florian-x]

Ah, I must add mine here! Dead-bug style

[StillTrying]

I did once think of wiring 2 carefully chosen spare gates of a 74AC14 like that to get more power conections into the chip to hopefully reduce the ringing, leaving 4 gates to play with. I thought it was an original idea but I've since seen one other mention of it for the same IC, maybe it works.

[rfmerrill]

And this is my "compact" build. As you see, I went a little nuts with minimization

Gosh, censor that porn, this is a family forum!

[magic]

I did once think of wiring 2 carefully chosen spare gates of a 74AC14 like that to get more power conections into the chip to hopefully reduce the ringing, leaving 4 gates to play with. I thought it was an original idea but I've since seen one other mention of it for the same IC, maybe it works.

That has to be one of those original ideas everybody comes up with at one point

I tried it too, using two pins in the middle on SO14. IIRC there was an improvement, but not as good as SOT23.

BTW, I just came up with something completely nuts
What if termination is removed from the output and placed in series with each supply pin independently, between the chip and the capacitors? That will likely kill the ringing, but I suppose some sort of artifacts will appear when the chip draws strong pulses of current internally during switching.

[Gyro]

Ah, I must add mine here! Dead-bug style

There are times when a bit of 'dead buggery' beats a PCB implementation, hands down. You can manage things that you simply can't on a PCB. 

[rfmerrill]

I added a 47nF C0G capacitor on the top side of the board. Not sure how much it improved things. Still usable.

[magic]

Not sure how much it improved things.

Not much would be my guess, I tried to convince you a few times that inductance of the package is absolutely the dominant factor here unless you make PCB parasitics worse

[iMo]

You want 74AUC gates to be really fast

https://hackaday.io/project/28833-microhacks/log/157535-just-how-fast-are-74auc-gates

[rfmerrill]

Like this? 

[magic]

With modern logic families people got good results using only two or three gates. (I have two and I think tggzzz tried three and reported 600ps rise time). I just used the minimum to ensure that absolute maximum ratings are not exceeded.

BTW, if you plan to use 3.3V chips it may be a good idea to put an LDO on the board to eliminate low frequency ringing due to cable inductance. Alternatively, 47µF. I forgot to mention that my BNC plug generator does have a 47µF MLCC on the bottom of the board.

[rfmerrill]

Not much would be my guess, I tried to convince you a few times that inductance of the package is absolutely the dominant factor here unless you make PCB parasitics worse

You said "power supply ESL" and I didn't quite get that you meant the power leads in the package.

[rfmerrill]

I just used the minimum to ensure that absolute maximum ratings are not exceeded.

I'm kinda burned out but what do you mean by this?

BTW, if you plan to use 3.3V chips it may be a good idea to put an LDO on the board to eliminate low frequency ringing due to cable inductance. Alternatively, 47µF. I forgot to mention that my BNC plug generator does have a 47µF MLCC on the bottom of the board.

I've got 0805 cap footprints across each of the driver chips now, so I can absolutely cap the heck out of it XD. Probably going to put 0.1uF 0402 right on top of them as well. Local regulator might be a good thing to try tho.

The board I'm fabbing out has really short and matched traces, I'm planning on using 0201 resistors (Vishay has a whitepaper where they show better frequency response with smaller package size) as well.

[StillTrying]

With modern logic families people got good results using only two or three gates. (I have two and I think tggzzz tried three and reported 600ps rise time). I just used the minimum to ensure that absolute maximum ratings are not exceeded.

When I was using a 74AC14 to 1us pulse 5mm LEDs I had the 3 or 4 parallel gates of the 74AC14 up to 9V and 800mA. It was getting quite warm with the LED only on 0.1% of the time.

[magic]

You said "power supply ESL" and I didn't quite get that you meant the power leads in the package.

Yes, sorry, everything counts. As far as I understand, it's simply a resonance of the LC circuit formed by the internal capacitance of all the MOSFETs in the IC and any inductance present along the way between the power supply terminals on the IC (package pins + PCB + external capacitors). This resonance causes the power supply voltage seen inside the chip to vary and hence the output varies too. BTW, the newer logic families likely have less internal capacitance which could be another reason why the 74LVC1Gxx gates ring less.

I just used the minimum to ensure that absolute maximum ratings are not exceeded.

I'm kinda burned out but what do you mean by this?

Look up "absolute maximum ratings" in the datasheet
There is also "recommended operating conditions"; I think I actually designed to stay within the recommended limits under normal operation and below absolute maximum under output short circuit to ground.

I'm planning on using 0201 resistors (Vishay has a whitepaper where they show better frequency response with smaller package size) as well.

Be careful with power dissipation. I used only two channels and two resistors and made them with doubled 0805 to be on the safe side.

By the way, I think you should add vias near GND pins of the driver chips (assuming the bottom is ground). Otherwise the return current has to take a round trip around the whole bunch.