Now that my
Commodore Pet 2001 clone is done and dusted, it's on to the next computer clone project, so here is a new thread......
Like the PET clone, this is going to be a functional recreation entirely in current production parts, eschewing any TTL. Due to public holidays, Digikey aren't going to ship my Z84C00 until Wednesday the 3rd and I won't be seeing it this week, but that will give me time to complete the PCB layout for the video generation circuitry.
So far I've completed the breadboard verification of the video generation circuitry - the schematic is attached. The only things not currently shown/included in this schematic are the '244 !RW/!WR buffer pair which will isolate the video circuitry data bus from the MPU system data bus, a jumper to select either a 50 Hz or 60 Hz field frequency, and the switchable
Electric Pencil lower case modification. All chips are 74HC(T) CMOS. Any device with an input driven from a data output pin of the AT28C256 (the character ROM) and the AS7C256 (the video RAM) is a HCT device, all else are 74HC.
In the original TRS-80 the designers skimped on memory, providing only seven 1-bit static RAM chips for the video memory. Bit-7 controlled whether a memory location defined either a graphics character or a ROM-generated "text" character. Bit-6 was the missing memory chip, leaving only six bits (bits 0 through 5) for selecting the character. So, that gave 64 ROM-defined "text" characters and 64 graphics/block characters (the latter giving chunky, pseudo bit-mapping). Only 64 text characters didn't leave enough room for lower case letters of the alphabet. Lower case letters, in addition to several other characters, were actually defined in the second 64 character page of the TRS-80's character ROM, but the original hardware just couldn't access them without bit-6.
The breadboard photo shows the compete video generator. For testing purposes only, I temporarily have a PIC16F874 plugged into the (currently) mostly vacant breadboard on the lower left. In lieu of the, currently absent, Z80 MPU system, this PIC is wired to the video circuitry address/data and control lines and programmed to load a test screen and character-set dump into the video memory.
The 64 "text" characters are sequentially dumped onto the very top character row, and the 64 "graphics" characters on the next. The remaining video memory locations are filled with #. I made a single byte of error in both ROM characters 1 and N. Also the left justification of 1 and perhaps : and ; probably doesn't look 100% right either. The ROM chip is currently kinda buried beneath wire links at the moment, so I think I'll put off re-flashing it just for the time being
In the low-resolution video mode, every second (odd) video memory location becomes redundant and the even characters are doubled in width by a halving of the pixel serial-shifting clock frequency. The vertical resolution remains the same.
High resolution mode:
Low resolution mode
This schematic is shrunk to fit your screen by the forum software. Save and load it into something else to view full size.