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Check My Constant Current Load (with Voltage Cutoff and MCU Control) Design
Posted by Mechatrommer on 22 Apr, 2017 22:48 -
well... if you have free time... Check My Constant Current Load (with MCU Control) 6 Days Worth (now its 4 weeks already) of Initial Design...
for design flaw, suggestion etc... (this is my design log fwiw)
Specification:
Voltage Input:100V80V max
Power: 200W maxCurrent: 10A max(until d4)
Current: 16A max (d6)
Feature: (starting d4)
-over voltage input relay cut off protection
-constant power current controlled by mcu
-mosfet damage cutoff check
-voltage level cut off (LiPo discharger)
i plotted some graph, higher Vinput = lower than 10A max current will be limited, i guess everybody knows that..
what else did i miss?
i maintain earlier revision just for history comparison. this is latest revision (w4)...
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Just a very quick look and I can see some problems.
First, there is a lot of difference between IRF540's from different brands. The Harris IRF540 actually have a DC SOA spec that would work beautifully for you. The IR and Infineon IRF540 have a safe operating spec that only goes to 700mA at 100V for a maximum of 10ms, and there is no DC specification for SOA. It would probably be no good for you. The Vishay/Siliconix IRF540 can do 5A for 10ms at 100V, but again has no DC spec. You could try it, but it could easily blow up if you use it in DC mode. Much better getting a device specified for linear DC operation. You cannot assume a mosfet can work reliably in linear mode with DC currents - many don't.
Next, the gate drive to Q3 and Q5 is inadequate. You only have 100K pull down. The gate-drain capacitance can be 40pF for the IR 540 or 100pF for the Harris 540. With two Harris devices, you have 200pf. The 100K resistor can only pull down with a current of about 30uA, and so that maximum slew rate on the drain that it can cope with is dv/dt = i/C = 30uA/200pF = 150,000V/sec. It sounds a lot until you realise that an application of 100V in less then 1.5ms can turn the mosfets hard on initially. You can easily get 10+ amps flowing for a short period even if the current limit is set to 1mA. The extent of this problem is affected by the size of the mosfet input capacitance and this gate input capacitance to reverse capacitance ratio varies from 14:1 for the Harris device to 50:1 for the IR device.
The other effect of the 100K resistor is that its time time constant with the mosfet gate capacitance can be as slow as 0.4ms.
The mosfets gates can drag the emitter of Q7 above the control supply voltage possibly to the point the emitter breaks down like a zener. This would happen by simply switching a 100V load on to the output of the constant current load.
The 100nF cap in the current limit regulator feedback is pretty high - it means your control loop has a low bandwidth and so it may not be able to handle non constant load transients very well. It may be adequate for your needs - I do not know. Getting a faster bandwidth control loop is hard work, but you get better transient response.
Richard -
thanks Richard for the comment...
The Harris IRF540 actually have a DC SOA spec that would work beautifully for you.
thanks for the headup. i was using Vishay DS for reference. the Harris one has the line (DC) that i'm expecting to see.. i didnt know different manufacturer has different spec.. just comparing the Id vs Vds graph, they both have very different characteristics. but luckily gate capacitance spec is closer. i just checked my IRF540 chip it has I(diode)R symbol on it, i'm not sure what, and hopefully its not immitation, i'll cross my finger on this. all design will assume original parts
Next, the gate drive to Q3 and Q5 is inadequate. You only have 100K pull down. The gate-drain capacitance can be 40pF for the IR 540 or 100pF for the Harris 540. With two Harris devices, you have 200pf. The 100K resistor can only pull down with a current of about 30uA, and so that maximum slew rate on the drain that it can cope with is dv/dt = i/C = 30uA/200pF = 150,000V/sec. It sounds a lot until you realise that an application of 100V in less then 1.5ms can turn the mosfets hard on initially. You can easily get 10+ amps flowing for a short period even if the current limit is set to 1mA. The extent of this problem is affected by the size of the mosfet input capacitance and this gate input capacitance to reverse capacitance ratio varies from 14:1 for the Harris device to 50:1 for the IR device.
where can i find reference on this matter? i'm not sure what term is this to google in the net. specifically the i/C formula. i know gate capacitance will slewed up slowly when charged and slewed down slowly when discharged, but how fast and the formula i dont know. i'll just put stronger pull down or gate driver, but the drawback the cost of the driver chip and current consumption will rise just for the gate. since this project will be mostly DC, i thought it doenst matter much of how slow of gate charge or discharge, no? although i'm planning the mosfets will work on pulsed mode, but at what frequency? that will depends on how fast the mosfet turned on or off later when i test it in pcb. i'm just uneducated guess here or just "follow the circuit behaviour" analysis here, no academic knowledgeThe other effect of the 100K resistor is that its time time constant with the mosfet gate capacitance can be as slow as 0.4ms.
how is it possible the application of high voltage transient to the drain pin will affect gate voltage?
The mosfets gates can drag the emitter of Q7 above the control supply voltage possibly to the point the emitter breaks down like a zener. This would happen by simply switching a 100V load on to the output of the constant current load.The 100nF cap in the current limit regulator feedback is pretty high - it means your control loop has a low bandwidth and so it may not be able to handle non constant load transients very well. It may be adequate for your needs - I do not know. Getting a faster bandwidth control loop is hard work, but you get better transient response.
i simulated the control feedback they start to oscillate somewhere at 10KHz, so i put the BW compensator, the simulator indicated the control loop will stabilize with that values. but i know simulation will never be the same as real world, so that value will likely to be changed in real life testing. with that values, simulator tells me the BW is 10KHz if i want to get satisfactory accuracy on current control, and no oscillation at higher freq. so i use simulator values as a ballpark. current set will be from a user trimpot, so its basically DC, but just in case if there is hi.freq transient...
edit: btw i've made some little changes to the critical section (gate driver).. i just connect them together (closer to the clamp diodes) and shared R18 and R19 upstream.. see attached...
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The IR IRF540 will probably be no good. I would be looking for something better and then design the circuit around the new device.
IR mosfets are designed as thousands of small hexfets in parallel. All get the same gate voltage. In linear mode, the current in each hexfet is controlled by the transconductance, and unfortunately below a gate voltage of 5.5V, the transconductance increases substantially with temperature. If one cell conducts more then the others, it heats up and conducts even more current then its neighbours. In saturation mode, the load sharing of the cells is self balancing. In linear mode, the load sharing becomes more unbalanced as the device heats up. At about 3.5V gate voltage, a hot cell could conduct 10 to 100 times more current then cold cell on the same die. The IR 540 has a much higher transconductance then the Harris or Vishay devices, and so this problem is much bigger.
Apparently the problem is not so much that a group of hexfets gets so hot it fails. I gather that when nearly all all the current gets concentrated in one area of the die, the latent body BJT transistor in the mosfet in the adjacent hexfets to the conducting cells can turn on, shorting out the device. Don't fully understand the mechanism but you can get a failure even when the mosfet does not seem very hot at all.
Many of the properties you want in an ideal switching mosfet are absolutely the opposite of what you want in a mosfet for linear operation. It looks like that the IR 540 was designed as a good switching mosfet. The high transconductance will also have the effect of making the control loop much harder to stabilise.
If you go for mosfets designed DC use such as the IXYS Linear Power Mosfets
https://www.digikey.com/en/product-highlight/i/ixys/linear-l2-mosfets
you will probably have a better result. These have an extra source resistor in each cell to help equalise the current and they have some way of bypassing the latent body BJT to make it nearly impossible to turn on. A device like the IXYS IXTH15N50L2 ($8.40 at Digikey) actually has the transconductance decreasing from 40 degC to 125 degC compared to the IR device that has a massive increase. I will talk about the other issues in a following post. -
Hi,
I suggest that you look at this thread: https://www.eevblog.com/forum/projects/dynamic-electronic-load-project/msg288313/#msg288313.
This will help you get the analog part of the load stable.
You should use one op-amp per MOSFET. If you share an op-amp you cannot be sure that the MOSFETs will share the current.
Regards and good luck with your project !!
Jay_Diddy_B
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...If you go for mosfets designed DC use such as the IXYS Linear Power Mosfets
thank Richard for all the advice its very educative... i dont have much option on my mosfet stock here, probably each one of them are designed for switching purpose... i'll keep the Linear Power Mosfets advice in mind.. in the mean time, i have another option in my stock, its a darlington power NPN BJT TIP142 rated at 10A 100V. are you going to say its ok?, i have the suspicion that BJT should work better, but many design in the net are using NMOSFET, so
https://www.digikey.com/en/product-highlight/i/ixys/linear-l2-mosfets
you will probably have a better result....
I suggest that you look at this thread: https://www.eevblog.com/forum/projects/dynamic-electronic-load-project/msg288313/#msg288313.
thanks Jay its a neat project. yes i saw earlier another design using this type of 1 opamp per mosfet, but it doesnt diminish the hotspot problem Richard mentioned earlier. and i'm quite hesitant to add another AD822, thats not a cheap opamp. but if anyone can confirm the mosfet will not get burnt i will reconsider.
This will help you get the analog part of the load stable.
You should use one op-amp per MOSFET. If you share an op-amp you cannot be sure that the MOSFETs will share the current.
Regards and good luck with your project !!
Jay_Diddy_Band are you really using TL074? thats not rail to rail, and its even possible to reverse polarity, not good. no?. on the safer side i ran through the hassle of ordering bunches of rail to rail opamp just for this project and thinking rail to rail opamp stocks will be a nice addition to my collection. AD822 rail to rail opamp which is used in the design is on its way here. but if TL074 can do the job, i will gladly reconsider my original decision of using rail to rail opamp.ok skip that i just realized you are using dual rail power supply. my design is using single rail to GND. ps: i strike the word instead of deleting it just so anybody may give advice if any possibility or example using non rail to rail opamp on single rail supply will work in this type or circuit.
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While it may blow your budget here, I've designed a similar circuit using LT1638 as the voltage sense amps - their inputs can go well above their supply voltages with basically no bad effect, which for a load is a pretty desirable property that might have more than one voltage sense range.
You'll also be moving a lot of charge on and off of the FET gate, and its pretty large for the linear FETs - it may help to simulate this for response time and current the control loop op-amp can deliver.
And yes, you'll need to use a linear FET. The IXYS range is probably your safest bet, but they are expensive. FETs are usually used since their dead-short performance is superior to a darlington or other bi-polar transistor. -
D6 will prevent the MOSFETs saturating thus limiting the compliance of the load. The threshold voltage of the IR540 can be up to 4V so the minimum drain to source voltage could be as high as 3.5V. Adding to the .2 ohms of the sense resistors then the minimum output voltage could be 5.5V @ 10A which is rather high. I'm not sure that D6 offers any worth while protection anyway - especially given that D7 will clamp the drains to -1V or so if the load is reverse connected.
Similarly, what is the purpose of D8? I assume it's for protection, but I can't think of a scenario where it would serve a purpose - the gates are actively driven by Q7 and should never go below 0V. I suppose you could make it a zener to protect the mosfet from excessive Vgs in the event the main regulator failing.
The relays need diodes or some other snubbers across the coils to protect the drive transistors.
It would be better to get rid of D9 and Q8 and drive U1A's iset directly from imcu through a resistor to avoid the extra drift as the forward voltage drop of D9 and Q8 Vbe won't match perfectly over temperature. itrim could then be coupled in at iset, perhaps by putting D10 inside U2B's control loop.
The signal itrim seems to be mislabelled as it is actually a clamp, setting the maximum current. Is this really it's purpose? If it is actually intended to trim out zero current offsets, then you could use the trimmer to adjust iset by +/- 1mV and change the range of imcu from 0-2V to 1mV-2.001V. This is to allow for the +/-800uV (max) offset of U1A which equates to +/- 4mA load curent. -
Been reading up on linear mode operation of fets, and it looks like "trench" mosfets while still having hot spotting, dont have the destructive runaway from the parasitic bjt until well over the max junction temp. Which may be a cheaper alternative,
Just hard.to find information on the failure soa without digging deep.
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D6 will prevent the MOSFETs saturating thus limiting the compliance of the load. The threshold voltage of the IR540 can be up to 4V so the minimum drain to source voltage could be as high as 3.5V. Adding to the .2 ohms of the sense resistors then the minimum output voltage could be 5.5V @ 10A which is rather high. I'm not sure that D6 offers any worth while protection anyway - especially given that D7 will clamp the drains to -1V or so if the load is reverse connected.
i'm not sure i can follow you fully, but... why you say "D6 will prevent the MOSFETs saturating"? its gate is driven at 0-15V swing from Q7, pretty much anything it can do to whatever mosfet operation whether in linear or saturation, the feedback opamp U1A will do whatever necessary to ensure certain "constant current" will pass through shunt resistor 0.2ohm. the maximum Vs swing up will be 2V (ie at 10A), gate swing up to 10-15V (8 - 13V Vgs depending on my final decision), much more room than needed to operate it in Rdson mode (linear?), or as other expert says, in ohmic region. but this mosfet is no ohmic region, so Vgs should be controlled at much lower voltage by U1A + Q7.
Similarly, what is the purpose of D8? I assume it's for protection, but I can't think of a scenario where it would serve a purpose - the gates are actively driven by Q7 and should never go below 0V. I suppose you could make it a zener to protect the mosfet from excessive Vgs in the event the main regulator failing.
D6 and D8 will protect the gate from inductive or transient kick in, its located near the gate, where Q7 driver can be substantially farther away. D6 will protect whenever Vg goes higher than Vd, and D8 protect when Vg tries to go negative. both can be replaced with a single zener gate to ground, but i have much fewer zener compared to fast acting US1M diode in stock, so i save them where i can. D7 by right is a bigger diode to protect from reverse polarity input Vds, to help with mosfet body diode. though this is a redundacy since i have mechanical relay and mcu to check this user's fault condition. nothing wrong with ommiting it, but if i can see inevitable condition that Vds can be reversed, i'll have a place to snap in the component.The relays need diodes or some other snubbers across the coils to protect the drive transistors.
yeah this is something i missed, thanks for the reminder.It would be better to get rid of D9 and Q8 and drive U1A's iset directly from imcu through a resistor to avoid the extra drift as the forward voltage drop of D9 and Q8 Vbe won't match perfectly over temperature. itrim could then be coupled in at iset, perhaps by putting D10 inside U2B's control loop.
itrim mean, current that is set from a user "trim"pot, imcu is calculated from mcu which maximum allowable current based on source voltage input by user at Vp+. D9,D10+Q8 will select which one is smaller.. Q8 out = minimum(imcu, irim), i know there will be voltage drop drift, but i'm not aiming at super precise device. i can certainly output current limit set from mcu alone, but i try to offload the work to an analog trimpot. and i'm suspecting sallen key filter will not be as good as analog trimpot at producing pure DC voltage.
The signal itrim seems to be mislabelled as it is actually a clamp, setting the maximum current. Is this really it's purpose? If it is actually intended to trim out zero current offsets, then you could use the trimmer to adjust iset by +/- 1mV and change the range of imcu from 0-2V to 1mV-2.001V. This is to allow for the +/-800uV (max) offset of U1A which equates to +/- 4mA load curent.
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i've made major changes since i forgot one of the main purpose is for my LiPo (or SLA or etc) discharger. so i added voltage level cut off (when Vinput goes low than the set level, current load will cut off), for this i have to upgrade the mCU and now i have more pins, moved all the trimpots to mCU input, removed the bjt Vdrop drift etc etc. but the power element and mosfet drive is still the same. please check the original post above...Quote
Feature:
-over voltage input relay cut off protection
-constant power current controlled by mcu
-mosfet damage cutoff check
-voltage level cut off (LiPo discharger)
here i reattach the same picture as in the OP...
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D6 will prevent the MOSFETs saturating thus limiting the compliance of the load. The threshold voltage of the IR540 can be up to 4V so the minimum drain to source voltage could be as high as 3.5V. Adding to the .2 ohms of the sense resistors then the minimum output voltage could be 5.5V @ 10A which is rather high. I'm not sure that D6 offers any worth while protection anyway - especially given that D7 will clamp the drains to -1V or so if the load is reverse connected.
i'm not sure i can follow you fully, but... why you say "D6 will prevent the MOSFETs saturating"?
Similarly, what is the purpose of D8? I assume it's for protection, but I can't think of a scenario where it would serve a purpose - the gates are actively driven by Q7 and should never go below 0V. I suppose you could make it a zener to protect the mosfet from excessive Vgs in the event the main regulator failing.
Actually I used the wrong term - instead of saturating I meant 'prevent the MOSFETs fully turning on'. (See next point)Quoteits gate is driven at 0-15V swing from Q7, pretty much anything it can do to whatever mosfet operation whether in linear or saturation, the feedback opamp U1A will do whatever necessary to ensure certain "constant current" will pass through shunt resistor 0.2ohm. the maximum Vs swing up will be 2V (ie at 10A), gate swing up to 10-15V (8 - 13V Vgs depending on my final decision), much more room than needed to operate it in Rdson mode (linear?), or as other expert says, in ohmic region. but this mosfet is no ohmic region, so Vgs should be controlled at much lower voltage by U1A + Q7.
D6 and D8 will protect the gate from inductive or transient kick in, its located near the gate, where Q7 driver can be substantially farther away. D6 will protect whenever Vg goes higher than Vd,
But you *want* Vg to be able to go higher than Vd. To fully turn the MOSFETs on, Vgs needs to be 10V or more - but when it is turned on fully, Vds will be close to 0V (Ids * Rds on). In your case when you try to turn the FET fully on, Vd will drop, but D6 will drag Vg down to .5V until Vg reaches the threshold voltage and the FET will start to turn of - reaching equilibrium at Vd = Vth - .5V. Worse, if the two FETs have different threshold voltages (likely) then the one with the lowest will turn the other completly off!Quoteand D8 protect when Vg tries to go negative.
I don't believe it matters if Vgs negative but I don't know if the reverse breakdown voltage is significantly different to the forward direction.QuoteThe relays need diodes or some other snubbers across the coils to protect the drive transistors.
yeah this is something i missed, thanks for the reminder.It would be better to get rid of D9 and Q8 and drive U1A's iset directly from imcu through a resistor to avoid the extra drift as the forward voltage drop of D9 and Q8 Vbe won't match perfectly over temperature. itrim could then be coupled in at iset, perhaps by putting D10 inside U2B's control loop.
itrim mean, current that is set from a user "trim"pot, imcu is calculated from mcu which maximum allowable current based on source voltage input by user at Vp+. D9,D10+Q8 will select which one is smaller.. Q8 out = minimum(imcu, irim), i know there will be voltage drop drift, but i'm not aiming at super precise device. i can certainly output current limit set from mcu alone, but i try to offload the work to an analog trimpot. and i'm suspecting sallen key filter will not be as good as analog trimpot at producing pure DC voltage.
The signal itrim seems to be mislabelled as it is actually a clamp, setting the maximum current. Is this really it's purpose? If it is actually intended to trim out zero current offsets, then you could use the trimmer to adjust iset by +/- 1mV and change the range of imcu from 0-2V to 1mV-2.001V. This is to allow for the +/-800uV (max) offset of U1A which equates to +/- 4mA load curent.
Ok. itrim is badly labelled - signal labels should generally reflect their meaning or purpose - what if you change the trimpot to a standard potentiometer?
You could simplify and eliminate the transistor and diode drift for 'itrim' by feeding the imcu to the top of the imax potentiometer and use the pot's ouput as iset directly - eliminating U2B, R35, R32, R34, D9, D10 and Q8.Quoteand i'm suspecting sallen key filter will not be as good as analog trimpot at producing pure DC voltage.
I think imcu should be pretty stable providing you are using hardware pwm in the mcu. You probably don't need to use an opamp to filter it - two consecutive RC filters should be adequate (at least one of the Chinese active loads generates the set current reference this way).
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Actually I used the wrong term - instead of saturating I meant 'prevent the MOSFETs fully turning on'. (See next point)
no. see attached picture. if i request the circuit to draw 0 - 10A (iset), Vgs only swings about 3.3 - 4.3V. MOSFET will never turned on fully.
But you *want* Vg to be able to go higher than Vd. To fully turn the MOSFETs onI don't believe it matters if Vgs negative but I don't know if the reverse breakdown voltage is significantly different to the forward direction.
it wont hurt putting it there would it?Vgs needs to be 10V or more - but when it is turned on fully, Vds will be close to 0V (Ids * Rds on).
anyway, the gate will be powered from different 10V rail, i still can fully turn the mosfet on if i put Vp+ = 5V
Ok. itrim is badly labelled - signal labels should generally reflect their meaning or purpose - what if you change the trimpot to a standard potentiometer?
its personal preferences, maybe it'll be a bit difficult to the reader but, i agree you have some sense there, thank you for the note. anyway it doesnt matter anymore since in the latest design, there is no more itrim.You could simplify and eliminate the transistor and diode drift for 'itrim' by feeding the imcu to the top of the imax potentiometer and use the pot's ouput as iset directly - eliminating U2B, R35, R32, R34, D9, D10 and Q8.
yup all eliminated already in the new design, every potentiometer/trimpot will go to mCU, analyzed and its output is on icalc and vcalc now.I think imcu should be pretty stable providing you are using hardware pwm in the mcu. You probably don't need to use an opamp to filter it - two consecutive RC filters should be adequate (at least one of the Chinese active loads generates the set current reference this way).
i believe active sallen key will produce better output than passive RC filter and better output impedance. in the new design, vcut and isetr (sallen key outputs) will go to another voltage divider (R31+R46, R44+R45 maybe will be around 4Kohm load impedance), if i use RC filter, it will screw the vcut2 and iset2 values for display purpose, i have to do carefull tuning on that if i use RC filter. but yes i do agree with you that just for this i have to put one dual rail to rail opamp (additional cost), but i'm prepared for it since i want it to be better, thanks.
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The IRF540 is not really suited for high power operation. Usually a TO220 case is not that useful for more than about 50 W. This comes in addition to the SOA problem. There are other MOSFETs more in between the IFR540 (that has a good chance to blow up due to SOA limits) and the very expensive linear specified MOSFETs from IXS. Such a candidate would be an IRFP240: larger case and better SOA. The Fairchild DS even specifically allows linear operation.
A separate control loop helps better current sharing and it also can faster drive the gate. It might very well work without the extra transistor stage. Without a separate loop the FETs would need to be matched and very well thermally coupled. The second OP is likely well spend.
There is some sense in limiting the gate voltage, when the drain voltage is low. One does not want to turn the FETs hard on, as this could lead to a large, possibly damaging current spike when connecting a voltage source after the control circuit is turned on. It is a good idea to have a lower voltage level for the drain of something like 1 V, maybe 2 V at high currents.
The relays only provide a limited degree of protection. Switching a mechanical relay is slow and with a high DC current a relay may not even reliably turn off. What is the purpose of the relays anyway. If it is for protection, it might be worth considering two MOSFETs in a kind of kaskode configuration instead instead.
The active filters for the set voltage sounds like a good idea. There are reasonable low cost rail to rail, or single supply OPs. At least a little negative supply (like 0.5 V) might be a good idea, even with rail to rail OPs. Operation near the limit is never perfect. -
Actually I used the wrong term - instead of saturating I meant 'prevent the MOSFETs fully turning on'. (See next point)
no. see attached picture. if i request the circuit to draw 0 - 10A (iset), Vgs only swings about 3.3 - 4.3V. MOSFET will never turned on fully.
But you *want* Vg to be able to go higher than Vd. To fully turn the MOSFETs on
Of course, but that's because you're sinking 10A from a 50V supply.
D6 isn't a problem if you don't need your constant current source to work with load voltages less than 2 to 3.5V at 0A (depending on the actual threshold voltage of the FET with the lowest Vth of the two) rising to 5.5V at 10A. But it would be a much more useful tool if you simply removed D6 (which doesn't provide any worthwhile benefit that I can see) allowing it to have a compliance voltage down to 0V at 0A, rising to around 2.3V at 10A. Would you, for example, not like to be able to use it to test a 3V supply, or discharge a Ni-mh cell down to .8V?
Even if you don't *need* it to work at low voltages, if the load voltage does drop enough, one of the two FETs will be turned off by D6 and the other will take all the current which could damage it. The simulation almost certainly won't show this because it will model the FETs with identical threshold voltages.QuoteI don't believe it matters if Vgs negative but I don't know if the reverse breakdown voltage is significantly different to the forward direction.
it wont hurt putting it there would it?
No, but there are a huge number of other un-necessary components which you could include in your circuit; why choose this one?
QuoteVgs needs to be 10V or more - but when it is turned on fully, Vds will be close to 0V (Ids * Rds on).
anyway, the gate will be powered from different 10V rail, i still can fully turn the mosfet on if i put Vp+ = 5V
But you can't guarantee fully turning on the FETs, especially at 10A. It's not about the 10V rail - it's because D6 clamps Vgs to a maximum of .5V above Vds. If the threshold voltage of both FETs is 4V (Vth spec is 2V min, 4V max), then Vds can't drop below 3.5V without the FETs turning off. Add 3.5V Vds to the 2V sense resistor drop and Vp will have to be greater than 5.5V for the FETs to be turned on sufficiently to operate in their linear region. In fact it's worse than that as Vgs needs to be around 4.5V for an IRF540 to sink 5A (typical at 25C) - so your minimum compliance voltage is now 6V to sink 10A. And that doesn't include resistance of solder joints, PCB traces, terminals and cables.QuoteI think imcu should be pretty stable providing you are using hardware pwm in the mcu. You probably don't need to use an opamp to filter it - two consecutive RC filters should be adequate (at least one of the Chinese active loads generates the set current reference this way).
i believe active sallen key will produce better output than passive RC filter and better output impedance. in the new design, vcut and isetr (sallen key outputs) will go to another voltage divider (R31+R46, R44+R45 maybe will be around 4Kohm load impedance), if i use RC filter, it will screw the vcut2 and iset2 values for display purpose, i have to do carefull tuning on that if i use RC filter. but yes i do agree with you that just for this i have to put one dual rail to rail opamp (additional cost), but i'm prepared for it since i want it to be better, thanks.
Falr enough, but why not use a larger pin count micro, preferably one with a 12 bit A/D and drive 7-segment LEDs rather than use voltmeters? I know the latter are pretty cheap but it would be a better solution to use the micro - you then don't need the active filters, vcalc, the voltmeter trimmers, lots of resistors and the display selection switches get replaced by dirt cheap pushbuttons. All the calibration gets done once in firmware.
Also with a larger mcu then you could easily add communcations to allow remote control and logging via serial port/USB/blue tooth module etc. for very little extra cost making it a considerbly better piece of test gear.
The '393 comparators you added have open collector outputs. Why not connect them directly to the MOSFET gates to turn the output off as directly as possible and also save 5 transistors, 9 resistors (you could filter the inputs to provide some delay)?
Personally I'd get rid of the comparators as well - if the current control opamp can't get the load under control then clamping iset to ground won't help anyway (but clamping the FET gates to 0V might, if the FETs are OK but the control circuit is faulty). In any case, with the approx 2.5ms delay (R40, R56 and C5) it would be quicker to do it in software if the mcu knows isense.
And you have another problem with the comparators: they have a maximum offset of +/- 3mV so with the resistor values shown iset will have to be at least 303mV above/below isense before the comparators are guaranteed to stop triggering which means the minimum load current would need to be over 1.5A. Additionally, if isense is below iset triggering the 'MOSFET damaged open' comparator, iset will get clamped to zero. The comparator may then turn on again - but thats not certain because of the offset voltage.
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The relays only provide a limited degree of protection. Switching a mechanical relay is slow and with a high DC current a relay may not even reliably turn off. What is the purpose of the relays anyway.
the device (relay) is normally open, so mosfet is not connected to input voltage. mCU will sense the voltage through smaller relay SR1 at the beginning, if its over voltage (greater than 100V or whatever value it will be), SR1 will disconnect and indicates fault led, user need to reset (by pressing Reset button) or disconnect the Vdc to restart mCU. during device (mCU) switched off or fault condition, the mosfet (and mCU) is guaranteed to be isolated from outside voltage. SR2 and SR3 will only connected if (1) input voltage (Vp+) is within range at all time, (2) mCU will output 0A at iset, and (3) user press Run Button momentary switch. after conditions are met, mCU will connect the relays and start ramping up iset from 0 to user selected potentiometer/trimpot position or mCU calculated current limit based on the device specified power limit, whichever is lower.
the relay will disconnect on the following conditions. (1) user push again the Run (Stop) button. (2) Vp+ reach down to (equal or lesser than) the voltage cut level (vcut). (3) user disconnect Vp+. in both run or stop mode, ie Vp+ = 0 (4) mosfet damage is detected. in all conditions, before disconnecting the relays, mCU will ramp down iset back to 0, for the safe disconnect. only condition (4) and "Vds plate is shorted" will not be guaranteed 100% in which fault led will lit, run led will off, but tremendous amount of current will go through shunt resistors. in any case whenever fault led is lit, user should immediately disconnect the Vp+ to avoid further damage to other components such as the gate driver and upstream.
the design will be based on assumption that... mosfet are not damaged. if they are, the current flow will be unspecified and the only hope is the mechanical relay disconnect. we can do redundancy protection but i believe the hobbiest will not be interested at buying the priceIf it is for protection, it might be worth considering two MOSFETs in a kind of kaskode configuration
i agree mechanical relays provide limited protection, but electronic switch such as you mentioned, is not 100% bulletproof either. there is even possibility that the protection mosfet will got damaged first during operation before the constant current load mosfets do, in which case there is no more protection, worst if user has no visible clue about this. tyring to do some checking on the protection mosfet will expand the circuit even further imho.Would you, for example, not like to be able to use it to test a 3V supply, or discharge a Ni-mh cell down to .8V?
draining cell batteries below 0.8V is asking for trouble anyway i appreciate your concern, if i want this device to work at low voltage i will not populate D6. but just in case i need it for high voltage purpose, i have pads to put it on.No, but there are a huge number of other un-necessary components which you could include in your circuit; why choose this one?
because i anticipate the damage due to reversed gate voltage, say -1KV spike. and again i can simply unpopulate this component.It's not about the 10V rail - it's because D6 clamps Vgs to a maximum of .5V above Vds. If the threshold voltage of both FETs is 4V (Vth spec is 2V min, 4V max), then Vds can't drop below 3.5V without the FETs turning off
ok now i'm getting you. thinking about it the matter you are trying to fight, it seems this is a strong reason to use zener clamp instead of double diodes. i will think about this. thanks alot.Also with a larger mcu then you could easily add communcations to allow remote control and logging via serial port/USB/blue tooth module etc. for very little extra cost making it a considerbly better piece of test gear.
no no no please dont add insult to injury. i'm on a very time limited budget here. i have no time to program all that, and i still love analog potentiometer rather than push button and very deep menus in version 2?, maybe yes. but i need this one working quickly as the project i should be working on right now (adjustable psu) is requiring this device. and 2nd point, i dont have large mcu other than atmegas that are stuck on the arduino boards. i think i have some atmega 44 or 30 pins laying around but, as i said, stock limited, large mcu is only for very serious projects (3 years development time budget) and no time for programming, it could take the whole year.
i'll read the rest of your post later as i'm at work now, thanks alot for your time and effort guys...
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new revision again... addition/changes:
1) each mosfet each opamp now as many have adviced. i believe non rail to rail opamp such as TL072, NE5532 may do the job.
2) increase amperage rating since i add power shunt resistors to avoid odd 0.333ohm figure (if using 3 resistors)
3) 5V rail is using dedicated voltage regulator now.
4) fuse protection F1 in the line of duty
comments welcomed. reattaching the OP latest revision below... fwiw...
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after 4 weeks of struggling i think i reach at the stage where i'm quite happy... the attached is my latest circuit...
CH1 yellow = iset
CH2 cyan = ss1
CH3 purple = current feedback opamp 1 output
CH4 blue = vm+
the performance is the following (comment appreciated)... ramp up from 0A to 16A (8A per TIP142) in 3us (22us to settle) (cyan trace CH2):
ramp down from 16A to 0A in 8us:
the test setup is for ~50% PWM pulse 15Hz (this device can do 10% - 100% PWM pulsed load:
...more test will be needed... fwiw... cheers