Fast switching Power MOSFET design

[satyamfifa]

Hey All,

I want to make a fast switching MOSFET design for a swtiching power supply, I want to have 10 kHz switcihng frequency and a PWM resolution of about 10 nanoseconds (yes I realized that it's pretty fast) and if that not possible then about 20 nanoseconds. The switiching voltage being 5-6 volts and switching current being 10 Ampere, it will also be nice if the same design worked on voltages upto 28 volts although that's not necessary.

I am considering of using DRV8323 with 1 A source and 2 A sink capability with a MOSFET like 4935N with Qg(tot) of 49.4 nC (at Vgs = 10V); Qgd = 3 nC and Qgs = 10.2 nC.

I want to use DRV8323 because of it is smart drive capiblity and slew rate control which is adjustable, as well as other features such are integrated current sense amplifies. I don't know if using a gate drive with a higher drive current would help here, because I understand that the biggest challange would here would be getter PCB parastics right which could cause voltage spikes and kill the driver and/or MOSFETs.

It is important to reach the required PWM resolution, also 10 nanoseconds is on the edge what DRV8323 can do, however I also need onto account other variable factors such as temperature because I don't know how will that affect the needed resolution.

So any help / advice from you all will be apprecited, it will be good know anything which could go wrong (I know it's an infinite list). Any sort of design consideration, better component selection etc.

Kind Regards,
Sparsh

[Siwastaja]

Some comments.

1) 10 kHz is extremely low, you will have easy times regarding this. You can easily spend some more time switching (reducing EMI and voltage overshoot) and still not cause massive issues with switching losses due to very low f_sw. If you really can afford the (relatively) massive inductor and capacitor sizes at 10kHz, this makes sense.

2) No, higher gate drive current won't help much. It would increase the maximum possible switching speed from the mere gate drive viewpoint, but you'd also need to minimize source lead inductance, and/or use higher gate drive voltages (even including the possibility of driving the gate negative for quick discharge). And, for what? At f_sw=10kHz, the switching losses are meaningless even when switching a bit slower, and you would do fine with an order of magnitude less gate drive current! In the end, you are likely to add some series resistance to the gates to slow it down, reducing the gate drive current. One idea to rationalize this to yourself is to give some percentage of the cycle for switching, say you decide to spend 1% of the time switching. At period = 100us, the switching time could then be as much as 0.5us! As a first-order approximate, 1A charges 50nC in 50 ns, ten times faster. (Accurate switching time calculation will be more complex than this, but often isn't worth the time.)

3) Why do you need such a high PWM resolution (10000 steps or 0.01% duty cycle control)? All the changing elements (with temperature and otherwise) in the circuit causes the output current and voltage to slightly drift all the time, given a fixed PWM setting, so what you need is feedback. With all the noise happening in an SMPS, the fine PWM control of 0.01% will be below the noise floor, in the other words, changing the PWM setpoint by 0.01% won't cause any measurable difference because everythings moving randomly much more all the time.