<30 ps pulse generator for TDR

[Marco]

An alternative would be to use a constant current source balanced with a sink (or sink and then source) to hold the line output at zero voltage and then disconnect the sink.

As I said before, the reverse recovery method has produced the fastest edge I've seen on this forum. It should work for this as well (with some complications for long steps, you'll need a second switch to pull down for long durations ... you can only saturate the transistor for a limited time for the fast reverse recovery to work).

PS. I suspect there is some similar physics going on with that method and with Drift Step Recovery Diodes, both require gently driving a junction forward for a limited time and then reversing (unlike SRDs which you can just forward bias indefinitely before reversing).

PPS. the SD-24 works exactly the opposite way, it takes the current source off the DUT to pulse.

[David Hess]

So the SD-24 works the way I described with a diode switched current source and gets into the 30 picosecond range.  That is reassuring but I cannot see being able to duplicate that performance without hybrid or maybe waveguide construction.  I would be happy just to get to 8 GHz.  Tektronix provided a nice theory section but no schematic details in the service manual.

The Tektronix 067-0587-02 and 067-0587-10 1 GHz standardizers generate differential edge rates better than 150 picoseconds good enough for 1 GHz oscilloscope calibration and may give some idea into how they went about it in the SD-24.

[Marco]

That is reassuring but I cannot see being able to duplicate that performance without hybrid or maybe waveguide construction.

I know I'm being repetitive ... but one of the edges on the scope trace of the pulse using the reverse recovery method dropped 80-20 in 4 picoseconds and he just used CPWG on a normal PCB with an end launch connector. It would require a fair amount of experimentation to get it to work though, you can forget about trying anything out in spice.

The Tektronix 067-0587-02 and 067-0587-10 1 GHz standardizers generate differential edge rates better than 150 picoseconds good enough for 1 GHz oscilloscope calibration and may give some idea into how they went about it in the SD-24.

If you just want something simple why not just drive a RF NPN into saturation without emitter degeneration with relatively fast logic? (ALVC for instance.) This should give you a damn good edge enhancement all on it's own ... it's not like these RF BJTs are slow even when used normally, cheap too.

[David Hess]

That is reassuring but I cannot see being able to duplicate that performance without hybrid or maybe waveguide construction.

I know I'm being repetitive ... but one of the edges on the scope trace of the pulse using the reverse recovery method dropped 80-20 in 4 picoseconds and he just used CPWG on a normal PCB with an end launch connector. It would require a fair amount of experimentation to get it to work though, you can forget about trying anything out in spice.

I mean duplicating the performance of an SD-24 which couples the edge into the 50 ohm termination (25 ohm impedance) of a sampling head without disrupting the sampling process and without using a power divider.  The pulse generator is effectively transparent before sampling occurs.

The Tektronix 067-0587-02 and 067-0587-10 1 GHz standardizers generate differential edge rates better than 150 picoseconds good enough for 1 GHz oscilloscope calibration and may give some idea into how they went about it in the SD-24.

If you just want something simple why not just drive a RF NPN into saturation without emitter degeneration with relatively fast logic? (ALVC for instance.) This should give you a damn good edge enhancement all on it's own ... it's not like these RF BJTs are slow even when used normally, cheap too.

The transconductance based reference flat top pulse generators I have studied work in the way you describe but without saturation and so far the fastest I have seen is 150 picoseconds using an integrated end-fire configuration like you see in the fastest integrated ECL/CML parts.  A PG506 uses discrete through-hole 2 GHz PNPs and 4 GHz NPNs to generate 600 picosecond (10 to 90) negative and positive edges but I believe performance is limited by layout considerations.  The similar National Bureau of Standard design is the same speed and the Picoseconds Labs improved implementation is 425 picoseconds.

I want to try this without saturation using a transconductance and diode switch based design.  Where it gets tricky is that the straightforward general purpose implementations have some complementary elements and PNP RF transistors are slower.  Lead inductance is a problem which Tektronix often solved by using dual base, collector, and emitter connections but nobody makes parts like that.

I have not exactly given up on step recovery diodes but I have decided to grade my own from varactor and PIN diodes.  I will have to add transistors as well now based on that link to the NPN based step recovery design.  Tektronix used all kind of odd diodes in step recovery applications.

[Marco]

I mean duplicating the performance of an SD-24 which couples the edge into the 50 ohm termination (25 ohm impedance) of a sampling head without disrupting the sampling process and without using a power divider.  The pulse generator is effectively transparent before sampling occurs.

The SSTD designed for NIF put 32 discrete diode samplers on a PCB transmission line and kept reflections to less than 2% (presumably measured with the SD-24).

Flat top is always going to be harder than step edge ... but step edge is all you need for TDR, or to generate a pulse through differentiation.

PS. the original paper for the reverse recovery method (which I had to find through google because the person who wrote the thread and blog didn't link it) is here.

[David Hess]

The SSTD designed for NIF put 32 discrete diode samplers on a PCB transmission line and kept reflections to less than 2% (presumably measured with the SD-24).

I have that article already saved.  The LLNL sampler is more than I want to tackle.

PS. the original paper for the reverse recovery method (which I had to find through google because the person who wrote the thread and blog didn't link it) is here.

Thanks for this.  I was planning on looking for it today.

I am surprised the relatively high collector junction capacitance does not limit performance but it probably would in a slower transistor.  I have been planning on testing the collector-base junction of various transistors in step recovery applications and this article gives me an idea of what can be expected.