Reproducing ST Design Gate Driver

[stain]

I try to reproduce the buck-boost converter from the "STM32F334 Discovery" board. Therefore I have drawn a KiCad Schematic and assigned the appropriate spice models. But unfortunately, I'm not able to reproduce the behavior. Or at least I think so, because the gate p-fet (P1) is in my opinion not properly driven.

[stm][/stm.png]
Picture form STM UM1735 Fig. 13

[kicad][/kicad.png]
KiCad schematic of the gate drive circuit.
A 1n capacitor is added as gate equivalent.

[waveform.png][/waveform.png]
The waveform at the "gate-caps"

I think something went wrong or I have a misunderstanding of the design.
For my own purposes, I would like to drive the Ubatt form 3.0-4.2V 3.7 nominal.
The logic level *_Drive may be at 3.3V but I would prefer 2.5V.

Because the p-fet from the reference design is not available, there could be some parameters to change for the p-fet (Vgs threshold).

[bson]

What if you add the D6/D8 zener from the original circuit?  Without it there's no closed circuit on P1, so it's not surprising if it floats around the 1n cap.

[stain]

In my opinion the zener does nothing but protecting the gate against over voltage.
The capacitor is meant to represent the gate of the MOSFET.
I'm only interested in the gate-source voltage and the dynamic behavior.
I don't see a "floating" problem.

However, I did the simulation anyway with the "exact" diode model from the manufacturer:

[T3sl4co1l]

What else is connected to P1, is this the entire simulation?

Your riddle is, why isn't it pulling up to Ubatt every time.  Q2-D voltage should be of interest.

Tim

[stain]

I agree with that.

Here is the voltage at the gate and drain of Q2 together with P1.

This is the complete simulation, nothing more connected to the nets.

I have no clue, why the voltages are decreasing over time.

[T3sl4co1l]

Netlist?

Tim

[stain]

There you go

[T3sl4co1l]

Q4 doesn't show up, does it have a model?

Can you also post the BC817 and 2N7002K models?  (I'll assume SMAJ and SIGNAL_SCHOTTKY are big libraries, and working fine anyway.)

Q3 and Q4 are probably wired wrong, with Q4 showing as a short circuit B-E (both sides are apparently Net-_Q2-Pad1_).  It's still not obvious how that would give the waveform.

Tim