Author Topic: FET static protection  (Read 6435 times)

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Offline jmoleTopic starter

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FET static protection
« on: June 28, 2014, 01:32:09 am »
Just encountered this problem on a recent project.

I made a multi-channel LED driver board, each channel having a low-side constant current driver of my own design, gated by a MOSFET on top that was driven by PWM outputs from a micro.

I ended up having to replace lots of the PWM switching transistors, that failed seemingly at random; either they would not switch on, or they wouldn't switch off all the way.

My guess is that this had something to do with static discharge during handling that exceeded the rating of the PWM FET. There's a connector between the LED and the PWM FET, so when the LED is disconnected, the FET's drain just floats, and is potentially susceptible to ESD (or so I think).

I'm sure this setup is pretty common, so I'm wondering how others have dealt with this issue (in a cost effective manner).

Here's the transistor I was using: http://www.mouser.com/ds/2/115/ds31867-45337.pdf

And a quick sketch of the drive circuit (attached)


 

Offline dannyf

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Re: FET static protection
« Reply #1 on: June 28, 2014, 01:54:01 am »
Not enough information to go by.

I would say that ESD is the unlikely cause here.
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Offline ignator

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Re: FET static protection
« Reply #2 on: June 28, 2014, 02:18:17 am »
I agree with dannyf. Is there some reason you are obfuscating a full circuit diagram?

 

Offline jmoleTopic starter

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Re: FET static protection
« Reply #3 on: June 28, 2014, 03:18:33 am »
Just because I didn't want to draw it all in illustrator :-p

All I know is that replacement of the MOSFET shown in the diagram solved the issue in all cases where I had this issue.

In cases where the LED wouldn't fully turn off, my scope was showing very erratic behavior at the FET's gate.

In the other case, where it wouldn't turn on at all, I don't remember what the scope waveform was showing, but again, replacing the FET fixed the issue, making me think it was an ESD issue.
 

Offline ignator

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Re: FET static protection
« Reply #4 on: June 28, 2014, 01:29:43 pm »
Quote from: jmole on Yesterday at 10:18:33 PM
Just because I didn't want to draw it all in illustrator :-p

All I know is that replacement of the MOSFET shown in the diagram solved the issue in all cases where I had this issue.

In cases where the LED wouldn't fully turn off, my scope was showing very erratic behavior at the FET's gate.

In the other case, where it wouldn't turn on at all, I don't remember what the scope waveform was showing, but again, replacing the FET fixed the issue, making me think it was an ESD issue.

Did these boards make it through test and were delivered to end customer? What is the human interface that turns the LED on and off, or is there no human interaction, and it's all processor controlled.
Keyboards can be a real problem with ESD injection. Connectors that have exposed pins are possible. But if you really believe it's ESD, an operator would have to be able to inject into the gate in some way. Your post indicates that this is a work not hobby issue, at least my interpretation.
 

Offline wraper

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Re: FET static protection
« Reply #5 on: June 28, 2014, 02:13:36 pm »
What I can see is that 1k resistor on the gate is too much. Considering 430 pF gate capacitance and that you are doing pwm it is not good at all. Gate will charge pretty slowly which will result in pretty slow mosfet switching. Therefore it will remain "half open" noticable amount of time and therefore will dissipate a lot of heat. That off course depends on pwm frequency used. If it is tens of Hz, not a very big deal but at kHz frequency it will have serious consequences.
 

Offline wraper

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Re: FET static protection
« Reply #6 on: June 28, 2014, 02:23:42 pm »
Also what is that current control in series with the source? You must apply voltage between gate an source and sticking something in between of them may have all kinds of effects. Drawing mosfet in bipolar transistor style is something funny BTW.
 

Offline jmoleTopic starter

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Re: FET static protection
« Reply #7 on: June 28, 2014, 09:45:35 pm »
Quote
What I can see is that 1k resistor on the gate is too much. Considering 430 pF gate capacitance and that you are doing pwm it is not good at all.

It's there to limit the current from the microcontroller pin controlling the gate. If you look at the datasheet, you'll see that any Vgs north of 2V is more than sufficient to turn it on. From a 5V micro, through the 1k resistor, this takes about 250ns (and confirmed as such with a scope).

I'm running a pseudo-random PWM signal through it at around 1 MHz, and have no issues with heat dissipation whatsoever, verified with a thermal imager. We also don't see failures happening during operation once the two boards (LED carrier and LED controller) are connected, operational, and tested; they are only spotted at the first test immediately after connecting the boards together.

Quote
Also what is that current control in series with the source?

It's an opamp/mosfet based constant current source (CCS), pretty similar to this:


Quote
You must apply voltage between gate an source and sticking something in between of them may have all kinds of effects.

Yes, but when the control FET (the one on top) is off, the voltage at the input of the CCS is 0V. When it's on, the voltage is between 0-400mV, depending on current. Since I'm driving the FET at 5V (ground referenced), there aren't any issues with the gate voltage not being high enough to fully turn on the FET.


Quote
Did these boards make it through test and were delivered to end customer? What is the human interface that turns the LED on and off, or is there no human interaction, and it's all processor controlled.

Just an MCU driving the gate. Boards were tested, and those that had issues with this were fixed. Then, after installation (and handling), a few ended up with the same issue again.


Quote
Connectors that have exposed pins are possible. But if you really believe it's ESD, an operator would have to be able to inject into the gate in some way.

My intuition is that there was some ESD damage during handling, but it's not clear if it was injected at the gate or the drain. The drain is exposed on the connector, making it the most likely place for ESD, but the boards didn't have a conformal coating or anything, so there is definitely a chance that the gate could have been touched at some point during handling of the boards.

The big question for me is how to prevent this from happening in the future, so I guess what I'm asking is: will an ESD event at the drain affect the transistor at all, or is it much more likely that this happened because of ESD on the gate?

« Last Edit: June 28, 2014, 09:49:41 pm by jmole »
 

Offline dannyf

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Re: FET static protection
« Reply #8 on: June 29, 2014, 01:06:04 am »
Quote
The big question for me is how to prevent this from happening in the future, so I guess what I'm asking is ...

Seems to me that you need to find out what is causing the failures. Otherwise, you are simply solving a problem that doesn't exist.
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Offline wraper

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Re: FET static protection
« Reply #9 on: June 29, 2014, 02:15:55 am »
If your current control circuit is like on the picture, that means source is basically floating when device is off (it is connected to GND in one direction through diode in another mosfet). And when you apply positive (relative to gnd) esd discharge to the drain, you basically apply it between drain(+floating source) and gate, not drain-source. That might explain the fault.
 

Offline jmoleTopic starter

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Re: FET static protection
« Reply #10 on: June 29, 2014, 02:18:20 am »
Quote
The big question for me is how to prevent this from happening in the future, so I guess what I'm asking is ...

Seems to me that you need to find out what is causing the failures. Otherwise, you are simply solving a problem that doesn't exist.

thanks for restating the question i'm trying to ask here...
 

Offline jmoleTopic starter

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Re: FET static protection
« Reply #11 on: June 29, 2014, 02:26:11 am »
If your current control circuit is like on the picture, that means source is basically floating when device is off (it is connected to GND in one direction through diode in another mosfet). And when you apply positive (relative to gnd) esd discharge to the drain, you basically apply it between drain(+floating source) and gate, not drain-source. That might explain the fault.


when the device (control FET) is off, i.e. when 0V is applied to the gate, the source isn't floating, it's at 0V potential because of the negative feedback of the constant current source.

though perhaps you're describing what's occurring when there is no power to anything on the board, in which case all terminals are essentially floating, because the constant current source isn't forcing the source voltage to any particular value.

before this iteration, the control FET sat beneath the CCS, but I placed it above it in this iteration, so that the CCS was more accurate, only having to consider the voltage drop across a sense resistor, rather than the combination of a sense resistor and FET D-S on-state resistance. The sense resistor is only .220 Ohms, so I reasoned that it would be better to have the control FET outside the feedback loop of the op amp, because of the variance in D-S resistance from device to device. I'm not sure if this configuration was more or less robust, since it was only tested in a prototype.
« Last Edit: June 29, 2014, 02:29:35 am by jmole »
 

Offline wraper

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Re: FET static protection
« Reply #12 on: June 29, 2014, 09:54:40 am »
Either when device is completely off or only second mosfet is off. Like in this picture.
 

Offline digsys

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Re: FET static protection
« Reply #13 on: June 29, 2014, 10:58:11 am »
First rule out possibilities that are easy to rule out - change 1K to 22R, put a 10K resistor and a say 12V Zener directly between G-S.
I know it's all low voltage, but there a few failure modes pertinent to FETs, so do it by the book.
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Offline wraper

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Re: FET static protection
« Reply #14 on: June 29, 2014, 11:05:23 am »
If leds are powered from 5V then diode from drain to +5V rail also can be added. So any larger voltage goes to +rail, not through mosfet.
 

Offline jmoleTopic starter

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Re: FET static protection
« Reply #15 on: June 29, 2014, 04:05:37 pm »
Quote from: digisys
First rule out possibilities that are easy to rule out - change 1K to 22R, put a 10K resistor and a say 12V Zener directly between G-S.
I know it's all low voltage, but there a few failure modes pertinent to FETs, so do it by the book.

I know for a fact the 1k resistor isn't the issue, and I'm running 24 channels of PWM off this micro, so I don't have the luxury of reducing the gate drive resistor because there's a chance I could exceed the current rating of the micro if all channels switched on simultaneously. The slower turn-on speed is also better in terms of EMF radiations.

About the zener, I'm curious if it would be better to have something like a TVS diode between each drain/source, rather than a zener.

Either when device is completely off or only second mosfet is off. Like in this picture.

Yeah, I see what you're saying now. The bottom device is never turned off when the system has power; it's either fully on with a 5V gate drive (when the top FET is turned off), or half-on when it's regulating the current through the top FET, because of the feedback loop. This might explain why I'm only seeing the failures after boards have been handled, and not seeing any failures during actual operation.

Also, your picture here (and earlier explanation) have me wondering about one solution I'd considered, which was a TVS diode between the drain and ground. It seems odd to put a TVS diode between the drain and source, although perhaps this is the right idea.

Maybe another alternative is a ~10k resistor between D/S and a TVS from D/GND.

Quote from: wraper
If leds are powered from 5V then diode from drain to +5V rail also can be added. So any larger voltage goes to +rail, not through mosfet.

The LEDs are powered from a separate regulator, which sits around 6-6.2 volts. On powerup, the LED is turned on at full brightness (i.e. the control FET is ON, no PWM) and full current (1A, set through a control voltage & the CCS), and the LED regulator voltage is margined so that the voltage drop across the CCS FET is ~0.2V, to avoid excessive power consumption and heat buildup in the CCS FET.
 

Offline wraper

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Re: FET static protection
« Reply #16 on: June 29, 2014, 04:22:12 pm »

Also, your picture here (and earlier explanation) have me wondering about one solution I'd considered, which was a TVS diode between the drain and ground. It seems odd to put a TVS diode between the drain and source, although perhaps this is the right idea.

Maybe another alternative is a ~10k resistor between D/S and a TVS from D/GND.
TVS between drain and GND would be a right choise IMO. Putting between drain and source is useless as it won't protect the gate in any way. You can also put diodes from drain to the 6.2V rail. Negative ESD will clamp through both MOSFET internal diodes to GND but positive on led power rail then.
 

Offline jmoleTopic starter

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Re: FET static protection
« Reply #17 on: June 29, 2014, 08:59:13 pm »
TVS between drain and GND would be a right choise IMO. Putting between drain and source is useless as it won't protect the gate in any way. You can also put diodes from drain to the 6.2V rail. Negative ESD will clamp through both MOSFET internal diodes to GND but positive on led power rail then.

I'm a little unclear about the TVS diode arrangement to the 6.2V rail. There is no connection between the drain and the 6.2V rail until the LED board is connected. I think what you're suggesting is a TVS diode in parallel with each LED. How would this prevent these kinds of failures?
 

Offline wraper

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Re: FET static protection
« Reply #18 on: June 29, 2014, 09:50:43 pm »
If you connect simple diodes from drain to 6.2V rail, leds don't need to be connected at all as you are not protecting the leds. You need to clamp ESD discharge to something. If you choose TVS diodes then just connect them between drain and GND as they are just zeners basically. Choose something with 8-12V clamping. You also can use special esd protection ICs which contain multiple TVS diodes, however most of them are for data interfaces.
 


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