Bandpass Filter Design Advice

[Gumbysauce]

Hey guys,

So I am working on a project right now that uses a piezoresistive sensor to do event detection in a fluid line. I have been having some issues designing a front end filter. I'm working with an attiny 85 atm, however I am in the process of moving to the Read Bear labs BLE nano development board. The device has some fairly stringent design requirements: I need it to be ultra low power, small form factor, Bluetooth enabled and have fairly robust event detection. Currently I am doing event detection by comparing the derivative of resistance against a threshold set by an external potentiometer. (I can't have a threshold for the resistance due to significant variability in the initial sensor value and the fact that there is quite a bit of drift while the sensor is in operation.) The problem is that I cannot get enough precision out of the ADC (seems like 10 bits is the best I can do reasonably) to measure the measure the change (I'm working on sensor sensitivity atm. But to give you an idea of what's involved, in order to do that I will need to have access to a clean room and some very specialized equipment, so that's not happening any time soon.) Anyway, that's probably enough background information to get started. My current design is a voltage divider w/ R1 selected to compliment the initial value of the sensor (I'm thinking about using a digital potentiometer here to do some on board calibration and to later use feedback to account for sensor drift.) and the signal from between the resistors is sent though a LPF to the ADC of the MCU.

I was thinking about instead implementing a BPF with gain, but unfortunately the frequency components of the desired signal also vary significantly, so I will need to have a pretty wide response up to the sampling frequency of the MCU (RN I'm guessing that I will sample at ~ 250Hz, but that is sure to change as the device is better characterized). At frequencies this low, the passive components of the Sallen key topology tend to get pretty bulky, so I was hoping that there was a different topology that I could use, or perhaps a configurable IC that would do the trick, but unfortunately I have no idea where to start looking for something like this. Hopefully you guys have some suggestions.

Thanks,
Gumby!

[danadak]

Use TI or Analog Devices design tool, and tradeoff higher R values
for lower C. There are noise consequences for doing this. Tools
will cover this.

Or consider digital filter, IIR approach. There are tools on the web
for calculating coefficients. But then you need a DAC if you need to
pass filtered value onto other parts of design. Could consider a PWM
DAC approach.


http://www.ti.com/lit/an/spraa88a/spraa88a.pdf



http://www.analog.com/en/design-center/design-tools-and-calculators.html


http://www.ti.com/tool/filterpro&DCMP=hpa_amp_general&HQS=NotApplicable+OT+filterpro



Regards, Dana.