You're correct about the crystal. The ATmega328PB's datasheet gives 6pF internal capacitance per pin.
Here they assume a stray of at least 3pF.
As per the formula (Ce+Ci=2Cl-Cs), your crystal (Cl=20pF) would need a Ce of 30pF.
Since the Appnote claims "For the newer AVR PB, the recommended capacitor value range is 12 pF - 22 pF, the total capacitance (Ce + Ci + Cs) for each pin must not exceed 22 pF.", and Ci=6pF; Cs assumed 3pF, Ce max would be 13pF. Since 12pF is a standard value, that seems good.
That would need a crystal with Cl=10pF. If you go for a Cl=9pF one you'd need 10pF Ce. Both those options seem fine to me.
For the decoupling capacitors, as a general rule, put one on
each IC power pin (Vreg, logic IC, VoltReg, Opamp, etc.).
Look at the datasheet values but if unsure 100nF is a happy place. Those should be
as close as possible to the IC power pin.
The ground pad of a capacitor should have a gnd via next to it's pad. The gnd pin of a IC should have a gnd via next to it's pad.
This provides ground plane stitching, but also (more importantly) allows the high frequency currents to take the shortest path.
(One should think about those currents while layouting and provide a path for them. An unbroken gnd plane is best.)
The bigger the decoupling capacitor value, the further away it can be located from the IC pin. (The position you have them now would be OK for 1uf)
Always check voltage regulator datasheets for the recommended supply decoupling.
MLCC have a voltage dependend de-rating. Make sure how much of your e.g. 1uF is actually left at used vs. rated voltage for the used dielectric.