48Mbps SPI over 1m of wire is very challenging, SPI is not supposed to be used for this purpose at all.
This being said, if you want to try, I would recommend the following:
* Twisted pairs (like CAT5) where the pairs are MISO+GND, MOSI+GND, SCK+GND, NCS+GND; or
* flat flex cable, ribbon cable or similar, where every other conductor will be ground. Pinout like GND, VCC, GND, n x [VCC, GND, ] if more power is needed, then MISO, GND, MOSI, GND, SCK, GND...
Approximate the transmission line impedance, for 0.5mm FFC with ground-signal-ground-signal it's somewhere around 70 ohms.
Then, use 4-layer PCB on each end. Use a web calculator for trace width (knowing the prepreg thickness of the PCB stackup), matching it to the cable as well as your guesstimate of the cable impedance allows.
Then, use source (series) termination resistors. Subtract approx. 20-30 ohms for the IO pin ESR. So in practice this would be some 33R to 56R; experimentation and signal integrity measurements are needed. These resistors go at the driving end; so with MISO, it's right at the slave's pin, three others are at the master.
Do not share the bus, only point-to-point allowed (otherwise the source termination doesn't work as expected). Pick a master MCU with a lot of SPI peripherals; if this doesn't work out, use bus switch/matrix ICs to isolate all except one path at a time.
It's OK to combine a few slaves to the same bus if they are a few cm from each other on the same PCB.
Finally, re-evaluate if you really need 48MHz. Going slower will allow you to slow down edges more, by increasing R and/or adding small filter C at the receiving end.