I am sorry I don't know much about HDMI, but your question is so well framed/communicated I just had to comment. The only slight idea is that the clock ratios between the video @ 1080p/60Hz and the audio are off? Do they need to be synchronized?
Thanks, however I think I might know what I need to do in order to fix it, although I am not entirely sure of the cause for it...basically I have a custom test board with headers that I can probe the signals from, so I started probing them and I noticed if I probe the MCLK or SCLK lines the audio improves, not perfect, but it improves, then I noticed if I squeeze the test header with my fingers the audio becomes perfect!
It must be the extra capacitance from my body / the probes which is making it work, but what I do not understand is why does it only need this extra capacitance on the audio lines if the video feed is at 1080p. Is the fact the FPGA is running at higher clock speeds (2.75x faster for the clock and around 11x faster for each of the 24-bit video signals) meaning that it's in turn consuming more power and not able to provide such a stable output on the audio lines?
It is a Nexys Video dev board with Artix-7 FPGA and all my signals (24-bit video, H-Sync, V-Sync, FID, H-Blank, V-Blank, I2S Audio, etc) all feed into FPGA banks 15 & 16 (due to how the dev board is designed and the need to use the FMC connector I can't really use other banks).
Is it simply too much for just those 2 banks to handle in a stable manner when having to deal with the video at higher frequencies? Would moving to a different FPGA bank resolve the issue (which I unfortunately cannot really do until I make this into a custom board and take it off the dev board).
It's strange, and I would like to figure out what is going on, but in the mean time I suspect adding some capacitors next to the inputs of the ADV7513 on MCLK, LRCLK and SCLK should make it work as I want.