Yes, but what about the OE and CS pins? I can tie the pin 22 (OE) on the 512 eprom LOW. I could then use the A13, A14 and A15 directly to the new 512 but what about the enable pins on the LS138? RFSH and IOREQ?
Can't you just ignore RFSH altogether? I don't see any DRAM on that schematic.
I agree with the idea of using a single 64k x 8 EPROM/EEPROM/NOR Flash (or the smallest still made if you go SMD) and then simply block it out with memory mapped devices. In other words, if an address doesn't decode to something else, let it CS# the EPROM.
And, by convention, ADnn is used for a multiplexed address and data bus, while in your schematic it's used to designate a pure address bus. This was rather confusing since the Z80 doesn't have a multiplexed bus.
It would be useful to see an address map...