PA0PBZ, I can't see any damaged or missing components on the board. D13 is under GPS receiver. After more detailed observation I think that's by design. So at that moment I don't think this is an issue.
Bryan, I can't believe that OCXO have 1ppm regulation, I think crystal aging would be around 5ppm... so regulation must be much wide, so I have ordered a new OCXO and waiting it to arrive.
As for MACT switch - as far as I can say it just enable output, while board still trying to do it's things - like locking OCXO to GPS or whatever reference is. So MACT doesn't impact Vfb at all, to my best understanding.
Another question is how PLL works - I can observe 9.765606kHz signal in PLL UP/DOWN outputs, meaning that this is frequency phase detector is working on. It's 10MHz / 1024, so it's obvious how to get it from OCXO frequency. However, I can't understand how they obtain reference frequency from GPS, as far as I understand there is nothing with such a frequency that comes from GPS sygnal... Anyway it comes from FPGA, so I can't really tell how PLL works, so I assuming it works.