74HC74 on DIY LCR meter missing pulses

[cyborg16]

Hi! I'm building a russian LCR meter under the name of "LCR2 GO" (see attachments). I modified the PCB to make it a little bit more DIY friendly (removing the vias from under the SMD IC's and that sort of stuff), and replaced the instrumentation op amps on the original design with a couple INA's I had lying around to avoid the painful resistor matching process. I also made a couple more modifications based on component availability, but that's not the point.
The thing is, after fixing a little mix up with an opamp inputs it's sort of working, but at seemingly random moments the 74HC74 responsible of generating the 0º and 90º signal (bottom right of the schematic) stops giving any pulses. The input signal of the IC doesn't change, as far as I can see in the scope, but it just stops working.
Has anyone built something similar or can give me some advice on why is it happening? Any lead will be appreciated.

Thanks in advance!
 
In the attachments: a couple of pictures, the original schematic and the modifyed one.

Pd. sorry for bad english

[floobydust]

Your schematic is wrong, the diodes VD6,7,8 at the 'HC393 would cause problems.

[cyborg16]

Thanks! I'll take a look at that. The signal after the 74HC393 is fine though. Could you explain what's the problem with them?

[Achu]

Hi could you give a brief explanation on the working of this device.
I have made a crude on e using Atmega 328.

[cyborg16]

Hi. I didn't design it, but I can try haha the MCU generates a clock signal that is divided by the 74HC393 and fed to the 74HC74 (the problematic part) to generate two signals with 90º phase shift. That square signal is then fed to the MAX7400 (8th order filter) to recover the fundamental (sine wave), and a couple more filters controlled by the MCU. That signal is then injected to the device under test. The 4052D selects the attenuation (range). The lower INA senses current and the upper, voltage (four terminal measurement). It performs 4 measurements in total, 2 for current and 2 for voltage (0º and 90º). After that, the signals are switched again into de ADC, from where the MCU reads the voltage and current to calculate the parameters of the DUT. That's all I can say, but if you have another question I'll try to answer it

[floobydust]

I looked again at the divide by 4 and sin/cos generator and the diodes are right, and making a finicky OR gate.
RLC-2 V1.1, V1.2 has R203=4.99k, C203=100pF (Rev. 1.1) or 33pF (Rev. 1.2). Your R203 is 1k, C203=33pF. Try increasing R203, the CLR pulse there might be too brief and make sure a 0.1uF decoupling cap is nearby for DD12, DD14. I would scope the CLR line on the 'HC393 to make sure the signal is reasonable, feeding the HC74. Schottky diodes there would give more signal swing if that is the problem.
It looks like 778 page thread the Russians used all kinds of odd ball 'NS390 IC's (Ukrainian?) or 'LS390 and had many problems with crappy IC's from Aliexpress.

http://kripton2035.free.fr/LCR%20meters/lcr-go-russian.html

"Microcontroller PIC16F876A forms SinClk (RC2, vyv.13) square wave frequency 10kHz, 100kHz  or 1MHz. The  signal is fed to the input divider performed on chips DD12 (HC393) and DD13 (HC74).  At the pin10. DD12 obtains the frequency SinClk/25, which in turn further divided by 4. At the outputs of the shift registers, signals shifted relative to each other at 90º, needed for SD. The signal is fed to 0_Clk chip DA6, an elliptic filter of order 8. "

[kripton2035]

link to the original author web page about this meter : http://www.rlc-esr.ru/index.php/rlc2
use google translate it's pure russian ...

[Kleinstein]

The HC74 needs a reasonable good signal with quite fast transitions.  C203 and VD8 could cause trouble for the falling edge in some cases.

Anyway the circuit looks really odd. With a µC to generate the clock, it is really odd to have the extra divider, especially one with an odd divider ratio set by the diodes.

The sine signal generation is also a little odd - my choice would be more like DDS in software with an R2R DAC.

[cyborg16]

I looked again at the divide by 4 and sin/cos generator and the diodes are right, and making a finicky OR gate.
RLC-2 V1.1, V1.2 has R203=4.99k, C203=100pF (Rev. 1.1) or 33pF (Rev. 1.2). Your R203 is 1k, C203=33pF. Try increasing R203, the CLR pulse there might be too brief and make sure a 0.1uF decoupling cap is nearby for DD12, DD14. I would scope the CLR line on the 'HC393 to make sure the signal is reasonable, feeding the HC74. Schottky diodes there would give more signal swing if that is the problem.
It looks like 778 page thread the Russians used all kinds of odd ball 'NS390 IC's (Ukrainian?) or 'LS390 and had many problems with crappy IC's from Aliexpress.

http://kripton2035.free.fr/LCR%20meters/lcr-go-russian.html

"Microcontroller PIC16F876A forms SinClk (RC2, vyv.13) square wave frequency 10kHz, 100kHz  or 1MHz. The  signal is fed to the input divider performed on chips DD12 (HC393) and DD13 (HC74).  At the pin10. DD12 obtains the frequency SinClk/25, which in turn further divided by 4. At the outputs of the shift registers, signals shifted relative to each other at 90º, needed for SD. The signal is fed to 0_Clk chip DA6, an elliptic filter of order 8. "

Hi! Thanks a lot for the answer. I totally missed the different values. I'll try that. The pulses after the 74HC393 are always present though. All the IC's have .1uf ceramics close to power pins, and just in case I added an extra one to the 74HC74.

The pictures from 01 to 08 are the signals with output present (working fine). After that I tried to connect the probe and the signal died immediately. The rest of the pictures are in "fail mode"

link to the original author web page about this meter : http://www.rlc-esr.ru/index.php/rlc2
use google translate it's pure russian ...

Thanks! I couldn't find it a while ago

The HC74 needs a reasonable good signal with quite fast transitions.  C203 and VD8 could cause trouble for the falling edge in some cases.

Anyway the circuit looks really odd. With a µC to generate the clock, it is really odd to have the extra divider, especially one with an odd divider ratio set by the diodes.

The sine signal generation is also a little odd - my choice would be more like DDS in software with an R2R DAC.

Yeah, I thought the same about the clock, I don't see the point. The rise and fall times looks fine to me, but I don't quite understand the figures in the datasheet. It says for input transition rise and fall rate (VCC 4.5V) Typ 1.67 Max 139 ns/V, thus having about 5.5ns on 5V I'm (as far as I understand) below the typical figure.

[Kleinstein]

The clock signal looks good at the scope picture, though the more critical edge may be the rising edge. Anyway this should not be very much effected by the diodes.

The problem could be more with the CLR pulse that may be to short, possibly leaving some stages in a metastable state.
The divider with the HC393 and the diodes is supposed to give a divide by 25, so that the corner frequency of the filter is just at the output frequency.

However there is no real need for this: the first harmonic to get rid off is at 3 times the base frequency. So one could as well set the corner frequency a little higher and use just a divide by 16 (no diodes and the signal from pin 6). The max7400 filter is so steep it would not make a big difference. Having the filter corner a little higher may even give a more stable amplitude. One could remove VD7 and make the divider :24 - this may also make the pulse a little longer.

Alternatively one could have done the divide by 25 with an HC390 instead - it directly has 2 divide by 5 stages, so one would not need the diodes.

[cyborg16]

The problem could be more with the CLR pulse that may be to short, possibly leaving some stages in a metastable state.
The divider with the HC393 and the diodes is supposed to give a divide by 25, so that the corner frequency of the filter is just at the output frequency.

Thanks for the help. I'll change the values to the original ones and see what happens

However there is no real need for this: the first harmonic to get rid off is at 3 times the base frequency. So one could as well set the corner frequency a little higher and use just a divide by 16 (no diodes and the signal from pin 6). The max7400 filter is so steep it would not make a big difference. Having the filter corner a little higher may even give a more stable amplitude. One could remove VD7 and make the divider :24 - this may also make the pulse a little longer.

If changing the duration of the CLR pulse doesn't help I might try this also

Alternatively one could have done the divide by 25 with an HC390 instead - it directly has 2 divide by 5 stages, so one would not need the diodes.

According to floobydust that might be problematic, and is kind of hard to get SMT IC's where I live (the nearest shop is like 4hs away), so I rather prefer not changing the IC's unless it's absoluetly necessary

How can conecting the probes (opened) cause the issue? Seems really weird

[Kleinstein]

I would not change the chip to HC390. It's more like odd they went with the HC393 and diodes instead of the similar chip to get the same function without the diodes. The more logical change would be to go for a divide by 16: one bodge wire, a trace cut and C203 changed to 0 ohms.

If connecting probes makes a change, this suggests that there is some EMI problem or a circuit just at the edge so that a little more noise / EMI can change things. This could possible also be indirect, e.g. with too much capacitive load at the XW4 terminal, that could make the OP DA1 oscillate. For less sensitivity it may need a capacitor (e.g. some 10 pF) directly at the DA1 pins 2 and 6.

Just as a side note: the gain switching stages are wrong (in the original plan only) - the feedback should switch between x1 and x0.1 not to ground.

[cyborg16]

Well, changing the cap and resistor seems to have make the things worse (I'm not absolutely sure though, but it isn't starting at all). The pulse is longer, but the final value is lower. Shouldn't it go at least above 1.6V/2V?

I would not change the chip to HC390. It's more like odd they went with the HC393 and diodes instead of the similar chip to get the same function without the diodes. The more logical change would be to go for a divide by 16: one bodge wire, a trace cut and C203 changed to 0 ohms.

Apparently this will be the next step

If connecting probes makes a change, this suggests that there is some EMI problem or a circuit just at the edge so that a little more noise / EMI can change things. This could possible also be indirect, e.g. with too much capacitive load at the XW4 terminal, that could make the OP DA1 oscillate. For less sensitivity it may need a capacitor (e.g. some 10 pF) directly at the DA1 pins 2 and 6.

I'll also check if it's oscilating, but I don't see how could it make the 74HC74 stop working correctly

Thanks!

[Kleinstein]

The size of the pulse is really odd. Depending on what type of xx393 is used the pulse should go up to at least 1.4 to 2.4 V.  A poor pulse could reset only part of the counter and this way stop the pulse generation.  I don't see a simple and good way to improve the pulse. A non inverting  schmidt trigger would be quite some effort. With SMD diodes it is also difficult to add a ferrite bead to the diodes.

With a boarder-line circuit is may one take a little lower supply or same extra capacitance. I agree that an oscillation OP would likely not stop the clock generation.

[iMo]

Your pulse is low in amplitude. With 5V HCMOS logic (0/1 decision point is 2.5V) it should be at least 3V peak or more.
It could be the R203=1k and 100pF is way too high load for the 393's output.
Increase it to 5k and decrease the C203 accordingly (say 20pF).
The width of the pulse is not such important, the HC74/393 is fast enough.
The 74HC74 there is to create the I/Q output signals, therefore the HC74's input freq has to be 4x the output one(s). Doublecheck the 74HC74 wiring such you get 90deg phase shift (not 180deg) at the I vs. Q output.

[cyborg16]

Well, I made some changes. I putted some Schottky diodes to see if I could improve the pulse amplitude and instead of 1kHz I started having 1.5xxkHz and quite some awfull signals. I went back to the 4148 and changed R203 to 3.9K.
It wans't working and then I let it there for a few minutes and went back and it was working.
I connected the probe and it was still working, until I shorted it and went dead. The pulse and the output of the 74HC393 are apparently equal in both cases (I changed the frequency manually in the middle), but the output of the 74HC74 is a mess

[cyborg16]

Your pulse is low in amplitude. With 5V HCMOS logic (0/1 decision point is 2.5V) it should be at least 3V peak or more.
It could be the R203=1k and 100pF is way too high load for the 393's output.
Increase it to 5k and decrease the C203 accordingly (say 20pF).
The width of the pulse is not such important, the HC74/393 is fast enough.
The 74HC74 there is to create the I/Q output signals, therefore the HC74's input freq has to be 4x the output one(s). Doublecheck the 74HC74 wiring such you get 90deg phase shift (not 180deg) at the I vs. Q output.

I think it's low too, but the problem seems to be in the 74HC74. The wiring is correct. When I have an output signal (kind of whenever it feels like it wants to work fine) it is as it should (1/4 of the input frequency and 90º phase shift), but then it dies and I have to power it off and on to get the signal back (and even doing that isn't always helpfull)

Another question. Some of the chips are powered thru 10k resistors and some aren't. Why is that? Filtering switching noise?

[iMo]

1. with your oscope (BW??) you most probably will not see the short needle pulse in its full amplitude
2. it looks to me the 74HC74 is somehow floating - doublecheck its GND and Vcc wiring
3. the 10k resistors in the Vcc/Vee of the 4053/52 - a bit high value, indeed. The other chips should not have such resistors in Vcc, however.

PS:
2. also doublecheck all 74HC74 pins - it could be a pin is floating (cold solder joint)

[cyborg16]

1. with your oscope (BW??) you most probably will not see the short needle pulse in its full amplitude
2. it looks to me the 74HC74 is somehow floating - doublecheck its GND and Vcc wiring
3. the 10k resistors in the Vcc/Vee of the 4053/52 - a bit high value, indeed. The other chips should not have such resistors in Vcc, however.

PS:
2. also doublecheck all 74HC74 pins - it could be a pin is floating (cold solder joint)

1) Posibly not (70MHz)
2) Triple checked actually, solid 5.08V at pins 1, 4, 10, 13 and 14 and also ground is ok. I'll resolder it just in case though because it does looks floating
3) Good, thanks

[Kleinstein]

Powering some chips through resistors is a common technique to keep out supply noise. In addition it avoid possible damage due to a latch-up event. Especially the older CMOS switches are a little prone to Latch-up, if for some reason current flows through the internal protection "diodes".
The 10 K values are rather high, but probably still OK. My normal values is more like 100 Ohms.
The CMOS switches use very little power and thus can easily be powered through resistors. Still they can produce quite some noise spikes when switching.

I just realized that if one would change the divider ratio, the right divider would be 32 and not 16. So the change would be just setting the CLR signal to ground. As a side effect the test frequency would be a little lower so it may need some small adjustments in the software too.

The CLR pulse is really odd - it normally should not be sufficient to reset the counter, but for some reason it does.
Another point to check may be the ground connections. Maybe there is a broken link somewhere. The layout seems to use a ground plane, but with quite some slits on the top. These slits can negate the function of a true ground plane. So it might be worth to check the ground with the scope at a few critical points.

A 70 MHz scope should be sufficient. The problem is more with where to have the ground.

[cyborg16]

Powering some chips through resistors is a common technique to keep out supply noise. In addition it avoid possible damage due to a latch-up event. Especially the older CMOS switches are a little prone to Latch-up, if for some reason current flows through the internal protection "diodes".
The 10 K values are rather high, but probably still OK. My normal values is more like 100 Ohms.
The CMOS switches use very little power and thus can easily be powered through resistors. Still they can produce quite some noise spikes when switching.

I just realized that if one would change the divider ratio, the right divider would be 32 and not 16. So the change would be just setting the CLR signal to ground. As a side effect the test frequency would be a little lower so it may need some small adjustments in the software too.

The CLR pulse is really odd - it normally should not be sufficient to reset the counter, but for some reason it does.
Another point to check may be the ground connections. Maybe there is a broken link somewhere. The layout seems to use a ground plane, but with quite some slits on the top. These slits can negate the function of a true ground plane. So it might be worth to check the ground with the scope at a few critical points.

A 70 MHz scope should be sufficient. The problem is more with where to have the ground.

Thanks for the explanation! It seems high, but the voltage after the resistor is still over 5V (for the positive rail).

About changing the ratio. How likely is it to help with the 74HC74 problem, considering that the output of the '393 is quite fine? I also doubt being able to get the source code and not only the .hex yo change the frequency.

The pulse in weird indeed, but hey. If it works, don't fix it!

The picture is the top layer of the board. I tried to keep the plane as continuous as possible, but it isn't that great around the 74HC74 to be honest. I'll try soldering a bodge wire from pin 7 directrly to the power supply ground to see if it helps.

Taking a look at the board I just noticed that the trace that carries the output signal of the 74HC74 runs under the +5V line. Can that be problematic somehow?

Update: I soldered the wire. No difference at all. I'm starting to think the problem is the chip itself

[iMo]

Try to feed the clk input of the 74HC74 directly from the MCU's output.

PS: you board is nice  , but 2x single sided, manually aligned, as I can see.
You are connecting the top w/ bottom tracks manually via wires.
You should carefully inspect all the soldering joints and nearby tracks for colds and shorts.. (best before soldering the parts into..).
Sometimes a small top/bottom alignment error could cause a short too.

[cyborg16]

Try to feed the clk input of the 74HC74 directly from the MCU's output.

PS: you board is nice  , but 2x single sided, manually aligned, as I can see.
You are connecting the top w/ bottom tracks manually via wires.
You should carefully inspect all the soldering joints and nearby tracks for colds and shorts.. (best before soldering the parts into..).
Sometimes a small top/bottom alignment error could cause a short too.

Thanks! The short you spotted is already fixed and checked. No continuity. After soldering the vias I did a carefully check for shorts, and also after soldering the IC's, and mainly the SMD parts that have traces under them. The surroundings of the 74HC74 were also inspected carefully and I couldn't find anything suspicious (neither short nor open). I have to go now, but I'll try the clock thing later

[cyborg16]

Follow up on this. I got a new IC and it worked immediately. So, that can happen.