It does not look like they implemented any active correction for the offset voltage drift other than the unshown automatic zero. It is fascinating to consider *why* chopper stabilization is not used. Also, a differential stage is not the only way to get a low offset voltage drift FET input stage; Vgs of a single JFET can be compensated and adjusted using the source current with the advantage of lower noise over a differential pair.
As the other posts alluded to, testing for things like offset voltage drift, noise, and low bias or leakage current is time consuming so there is a severe tradeoff between guaranteed specifications for these and cost. Manufacturers may choose to grade or select parts themselves, or make arrangements with the manufacturer of the parts to do it for them. Some designs include automatic calibration.