How does this opamp circuit work?

[XaviPacheco]

This circuit is used in single stage CCM PFC Boost Converter. This is the whole design.. It seems like a zero cross detector. But how is the working principle through the resistors R36, R38, R35, and R40, and the diodes?

[ThomasDK]

It's not an opamp, it's a comparator.
The resistors form a voltage divider on each input and the diodes protect the inputs from overvoltage.

[XaviPacheco]

It's not an opamp, it's a comparator.
The resistors form a voltage divider on each input and the diodes protect the inputs from overvoltage.

Sorry, yes it's a comparator. What I want to know is how the process of detecting zero cross is achieved. It seems like the circuit should handle the case when the hot and neutral are reversed, right?

[T3sl4co1l]

Hmm, poor use of common mode range, the ground between R36/R38 should be biased to say +6V or so.  Or at least ~1V.

Anyway, yes, that would be a zero-cross detector.  The resistors and diodes form a clamped voltage divider.  A differential comparator determines the higher of the two, and produces a signal indicating which.

Each pair of resistors has the response (and respectively for AC_N and IN+):
IN- = AC_L * R36 / (R35 + R36)
These nodes have a Thevenin equivalent resistance of R36 || (R35 + Rsrc).  When the voltage between them exceeds about 0.6V, the diodes conduct, limiting the voltage difference.  Thus the comparator sees a maximum of +/- 0.7V across its inputs, more or less.

Note that Rsrc includes any GND to mains impedance.  Presumably, this circuit is either floating (isolated) in which case Rsrc is very high (actually, R35 || R40 since those are then the only connections between GND and mains), or, the circuit is mains-referenced (GND is actually AC_N, or DC_N after a rectifier, etc.) or ground referenced (GND is actually EARTH), in which case Rsrc is low (or, should be).

We might design this network to give an arbitrary gain (from mains to input) of say 1/100th, so that the comparator can make its decision (this happens in a range of about 5mV at its inputs) in a reasonably precise range (i.e., < 1V).  We would then get a maximum input of Vpk / 100, or several volts, well within the capability of this comparator (12V supply).  If we need greater sensitivity, we can reduce the ratio (increase R36/R38, decrease R35/R40) to put a higher voltage at the comparator; if we go over 12V however, we exceed the common mode range, and the comparator won't produce meaningful results (e.g., its output may invert).

So we put clamp diodes in place, to limit the voltage seen by the comparator, allowing even higher gains, and allowing some immunity to the nasty voltages seen on the mains.

So the common mode problem I mentioned earlier, is this: the comparator operates correctly for inputs roughly in the 0-12V range (actually a bit more or less depending, but relative to its supplies in any case).  As shown, each input is divided towards zero, which means under normal conditions, one input spends half the time in the 0 to -0.7V range!

It gets worse.  In general, you must assume the mains voltage has peaks up to 1.5kV between lines, and 2.5kV to ground!  These are not continuous ratings -- they only occur under extreme conditions, usually lightning strikes (sometimes nearby switches/relays operating, too).  But if an application can't tolerate those microseconds of extremes, that's bad.

The clamp diode helps with this between lines, but not common mode.  Suppose ground is earth, and a 2.5kV common mode surge hits; this puts the full, whatever, 1/100th of 2.5kV or 25V, on the comparator input.  Or worse if that one single resistor breaks down and delivers many amperes into the poor comparator.

Tim

[SiliconWizard]

This circuit takes advantage of the ability of the comparator to work with slightly negative voltages (within a clamping diode's drop below ground). Due to the attenuation, V+ and V- are kept within acceptable limits. The two diodes further protect the circuit in case of overvoltage on the mains line.

The capacitor C37 will introduce a phase shift, so that must be taken into account when selecting the resistors' values and the capacitor's value.

Attached is a low-power example of this on a purely 3.3V supply and a 240VAC input signal.

[XaviPacheco]

This circuit takes advantage of the ability of the comparator to work with slightly negative voltages (within a clamping diode's drop below ground). Due to the attenuation, V+ and V- are kept within acceptable limits. The two diodes further protect the circuit in case of overvoltage on the mains line.

The capacitor C37 will introduce a phase shift, so that must be taken into account when selecting the resistors' values and the capacitor's value.

Attached is a low-power example of this on a purely 3.3V supply and a 240VAC input signal.

I'm trying to calculate the input voltages a IN+ and IN-. Your waveform says there's about 160mV peak. This value comes from the voltage divider ratio, right? Let's say AC_N will be at zero volts, so the comparator '+' input will now also be at zero volts. The voltage at IN- is AC_L * R36 / (R35 + R36)?

[SiliconWizard]

Basically yes, except the capacitor further forms a low-pass filter and further attenuates the signal a bit.
You can use a lower value for C1 to minimize the phase shift. It's there to low-pass filter the mains voltage which can have some high-frequency components that could make the comparator give spurious transitions.

That said, those symmetrical signals come from the fact that I used a floating AC source for demo purposes, so it ended up giving signals centered around the circuit's GND.

After taking a closer look at the whole schematic of this ST circuit, this is not quite what happens. I'll attach a simplified circuit that I think is a simplified but close approximation regarding how the GND relates to the mains input in ST's implementation.

It still requires a comparator that can work with input signals close to ground, something to check when selecting an appropriate comparator.