Update on the device:
Everything is now inside the case and so far the hardware seems to work.
There were some issues with signal integrity on the SPI-Bus, which I had to solve by connecting the data and CLK-Lines to GND via 22pF caps (the entire thing worked when I measured it with Scope-Probes, but ceased to work once I took the probe away - Active probe from Transverter-Store is ordered, but still on its way).
Also the Attiny is sort of connected wrong: The Libraries for i2c I could find use different pins (the Chip has two pairs for SDA and SCL connected to the USI).
![Roll Eyes ::)](https://www.eevblog.com/forum/Smileys/default/rolleyes.gif)
So I reverted back to the original solution: PCF8574 for the keyboard and STMPE620 for the Touch.
I also designed a board that distributes a 20 MHz Ref-Clock for the Signal Sources and contains a MAX 10 FPGA + SDRAM, as well as i2c-distribution. The FPGA is intended as a advanced controller for the AD9910 and can communicate with the chip via SPI, as well as the parallel interface.
The 20MHz REF-CLK is controlled by a PLL, so locking to an external 10 MHz Reference is possible. In addition to that, 2 Outputs for the 10 MHz-Reference-Input are also fitted on the board.
Of this second board I have so far verified the PLL and that the FPGA is connected to the JTAG-Connector correctly.
Which brings me to the current status of the project:
- Verification of Communication between boards: DONE with the exception of the AD9910-Board
- Signal Generation with ADF4351: DONE
- Signal Generation with AD9910: DRIVER AVAILABLE, NOT IMPLEMENTED YET
- Control of Step Attenuator: DONE
- Amplitude-Control: MANUAL CONTROL OF STEP-ATTENUATOR
- SignalPath-Switching: TESTPROGRAM IMPLEMENTED
- AGC: NOT TESTED, DAC-CONTROL WORKING
- TOUCH: WORKING, NEEDS IMPROVEMENT
- KEYPAD: DONE
- UI: FRAMEWORK READY, IMPLEMENTATION OF FEATURES STARTED
What makes the testing a bit difficult is how the boards are arranged inside the case. Reaching test-points and measuring something is basically impossible. Also I'm still waiting for the SMA-Connector that will be put on the front-panel. It might also be necessary to put a PA somewhere in the signalchain, as it seems that the output power, especially above 2 Ghz, is dropping significantly.
A much better way to arrange the boards would be to put them side by side on a piece of wood, Copper clad Board, or a 3D-Printed Board-Holder.
Btw. At the moment I have 7 boards of each module (CPU-Board, REF-CLK + FPGA-Board, Analog Board with Filters). If someone wants these boards, please PM me.
![Smiley :)](https://www.eevblog.com/forum/Smileys/default/smiley.gif)
I've also populated the Github-Repository now. So if anyone would like to contribute to the software, please do so
![Smiley :)](https://www.eevblog.com/forum/Smileys/default/smiley.gif)