Could you post a larger resolution picture? Because even at full size, this one is still hard to read.
From what I *could* see, there doesn't seem to be anything wrong though, except VDD decoupling. There is only one bypass cap that I could see, and (but it's hard to read) it looks like it's 15 pF?? You typically need like 100 nF. Also, you should put one bypass cap per VDD pin on the MCU (and layed out close to said pin), also including VDDA, and ideally VBAT and VDDUSB as well.
Another point, less problematic, but that I still suggest: add a 100 nF cap (to ground) to the NRST pin. This pin has an internal pull-up, but adding an external cap helps making this more robust to external perturbations.