I cannot find in datasheet what is maximum frequency of sinus signal generated from 32 samples using internal DAC in "Arduino UNO R4 Minima". I wasn't able to find this information on Arduino website, nor in Renesans manual of MCU R7FAM1AB3CFM. Found information that max. square signal frequency is about 52 KHz.
Could somebody give me estimated max. frequency of sinus signal generated from min. 32 samples.
You may need to experiment, to see what can be done.
Depending on the internal DAC design, you might be able to go (much) faster than the paper values.
eg on a SiLabs MCU DAC, I've managed to directly INC/DEC the DAC register at up to 36MHz, which is way above their paper rate, but it keeps inside their slew rate spec, because only one LSB step changes at a time.
It is also possible to generate sines faster than their paper rate, provided you keep inside the slew rate.
A 32 step sine has only a small step change.
The Renesas DAC data says
Conversion time - - 30 μs -> 1041.666667 Hz max at your 32 samples per cycle.
I cannot see a slew rate number.
So you need to experiment, ie write a tight loop that dumps your table to the DAC and check it works at 30us per update, then speed that up until it breaks.
If it appears to be slew rate limited, you can generate a smaller amplitude sine and add external gain to nudge the rate up faster.
Addit: Google finds this
https://forum.arduino.cc/t/arduino-uno-r4-dac-speed/1177741/8There, scopes shots give you exactly what you need
One example has updates at 588kHz and shows
a DAC slew rate of about 5V in 2us or 2.5V/us You can generate a triangle wave of roughly 5V amplitude up to 250kHz, at that top rate, actual values depend on slew rate, not DAC precision.
A sine wave must fit inside that triangle, so you could choose a lower amplitude at 250kHz or a lower frequency.
This comment in the code examples given is in one example
*DAC12_DADR0 = loop_count++; // DAC update - takes c. 210nS - DAC ignores top 4 bits
That comment suggests ~150kHz for your 32 sample sine.
For DDS you need to increment and table lookup, so if we guess that takes 312ns, you hit 100kHz ballpark for your 32 sample sine, using 100% MCU bandwidth.
Looks like you hit a code speed limit just before you hit the DAC slew limit, if chasing full swing Sine out, for your 32 steps.
Fewer steps will hit the slew limit first.