DSPIC33FJ32MC202 PWM DUTY CYCLE PROBLEM

[keshab.patel]

 Hello folks. Recently I came across a problem using a dspic33fj32mc202 using independent pwm. So what happens is when I set the duty cycle pdc1 half of the ptper(period), then I should get a duty cycle of 50% but the duty cycle I get is 25%. Just like that I get 100% duty cycle when I use value in pdc1 register twice of the value of ptper register. I am using it in free running mode which implies it should operate in edge aligned mode.

  Please help if anyone has experience.

Code:
P1TCON=0b0000000000000100;
P1TPER=530;
PWM1CON1bits.PMOD1=1;
PWM1CON1bits.PMOD2=1;
PWM1CON1bits.PEN1H=1;
PWM1CON1bits.PEN1L=1;
PWM1CON1bits.PEN2H=1;
PWM1CON1bits.PEN2L=1;
PWM1CON1bits.PEN3H=0;
PWM1CON1bits.PEN3L=0;
P1DTCON1bits.DTAPS=1;
P1DTCON1bits.DTBPS=1;
P1DTCON1bits.DTA=0;
P1DTCON1bits.DTB=0;
P1FLTACON=0;
//P1DTCON1bits.DTAPS=2;
//P1DTCON1bits.DTA=63;

P1DC1=530;   
P1DC2=1060;

P1TCON=0b1000000000000100;  //pwm module on

/
/

I get 50% duty in pwm1h and pwm1l.  which should be 100%.

I get 100% duty in pwm2h and pwm2l pin.   

[Odysseus]

I'm pretty sure this is the expected behavior of the dsPIC PWM peripheral.  I can't find where it's stated explicitly, but the PWM peripheral has the nifty ability to have 1/2 Tcy resolution for the duty cycle, while the period has a resolution of 1 Tcy. This can be inferred from page 34 (section 14.13) of the Motor Control PWM documentation: http://ww1.microchip.com/downloads/en/DeviceDoc/70187E.pdf  Notice that in table 14-1 and 14-2 that for a 100% Duty cycle, the listed value for PxDCy is twice that for PxTPER.

The nice thing about this is that to create a 50% duty cycle, the two registers can be set to the same value.