PIC16 COG unit configuration to drive boost full bridge converter.

[Miyuki]

Hi folks.
I want to use PIC16F17 (as this is one of a few available MCU with SMPS controlling capabilities)

It will run in peak current mode
But I cannot figure out what will be the best way to configure it
Especially how to gate the signal from the comparator to shut down just one branch of transistors

Should I route the comparator signal thru a CCL unit and AND it with PWM or is there some better way?

In this topology

[DavidAlfa]

You need high-side and low-side drivers for each mosfet. Each pair is connected to the same PWM pin.
Ex. PWM Ch1 handles Q1+Q4,  PWM CH2 handles Q2+Q3
Remember to provide enough dead time or everything will blow up (cross-conduction or shoot-through).

[nigelwright7557]

You can pretty much use any PIC to do SMPS work.
I used one with a IR2113 high/low side mosfet driver with good results.
I used a feedback system to regulate the output voltage.
With a simple LLC circuit I just changed frequencies to adjust power.

[Miyuki]

DavidAlfa: it does not have a dead time, it has all four on for most of the time

I should write it more clearer. I have a single I_L value/compare signal and need to alternate it between the first and second leg.
To achieve his waveform

[uer166]

Is this called a current fed push pull? What happens to the FETs when they all open for whatever reason (MCU reset etc)?

Pls post pictures/results of it doing stuff!

[Miyuki]

Is this called a current fed push pull? What happens to the FETs when they all open for whatever reason (MCU reset etc)?

Pls post pictures/results of it doing stuff!

It works a similar way as current fed push pul. But this topology is actually commonly used as far as I know.
When MCU fails and opens all at once either is there a protective clamp or just relies on avalanche rating of transistors to absorb all the energy in the indutor. It is not a big issue for an event what should not happen

I might end up using AVR DB and configuring CCL units to do this

[uer166]

Since it's boost derived I expect you'll have a right half plane zero in system to deal with. I wonder what advantages this topology has over a regular buck-derived forward converter. I suppose it has a much higher range of output voltages? In any case, interesting topology that I haven't seen in the wild yet.

[T3sl4co1l]

I don't like it simply for the fact that there's no startup / fault limiting.  At best, it's swapping back and forth at nearly 50% duty cycle (notice such a circuit uses overlapping dead time, so "nearly" means slightly over 50% PWM, the full control range being up to say 80 or 90%), in which case in steady state, the bridge is fed by Vin and thus the output sees Vin * N2/N1, less semiconductor drops.  There's no way to reduce this further, only boost up from here.

Better would be a buck-boost or SEPIC sort of topology, where voltage can be set to zero, but this topology cannot produce such a transfer function.  Easiest change is adding a buck stage in front, to get a bog standard current-fed inverter.  This is quite pleasant to do, even with a fairly modest MCU, as the buck can be average current mode with a comfortably large inductor and relatively low loop bandwidth, and the bridge is just always-on at 50+δ % PWM, no bridge control needed.  (Well, it can have a fault state with all switches at 100%, that's fine too.  Maybe a "fault fault" state where everything goes open, which might protect the supply/input fuse in event of buck failure.  You'd need to put in additional logic to detect and trigger such a condition, plus TVS diodes to clamp the resulting flyback.)

I did this a long time ago, just using a CD4047 for the symmetrical 50% bridge drive, and, forget what the buck was, might've been a synchronous controller?  Or maybe I did it discrete heh, I don't remember.  Output was driving a bunch of planar 1:1 transformers in parallel, for a gate driver array.

Which was also I think, the first design I noticed PN diodes can have lower losses than schottky, in certain cases.  Specifically, for this one it was clamping at the bridge (since the transformer load has leakage/strays, which cause a voltage spike every time the bridge commutates), and probably the buck ratio was enough that this could be clamped back to the input, so no TVS needed, nice.  Schottky capacitance was just too much, but PN was fine.  PN are generally better for pulsed application like this anyway -- clamping and snubbing -- which schottky aren't so great at.  (That said, I've used a few 4A 600V SiC schottky for snubbing offline flybacks, with great result.  Just personal one-offs though, don't think you can justify the cost so easily in a commercial use case.  Also would be nice if anyone made SiCs in DO-214xx for 100s mA application, but nah.  Shame.)

Ed: Oh, or I suppose if the source inductor, instead of being passive, had a dual winding with inverse clamp diode, so it flies back to a peak of 2*Vin at the bridge.  So the output transfer function is kinda sorta like a 2-switch flyback that's never more than Vin * N2/N1, or in this case 2*Vin * N2/N1.  Then the bridge can go below 50% to reduce level, and the source inductor returns excess energy to the supply, no burning up TVSs.  Still need clamp diode(s) to deal with strays, and leakage in the source coupled inductor, but that can at least be a smaller fraction of the total, rather than a modest fraction of full output(!).

Tim

[DavidAlfa]

DavidAlfa: it does not have a dead time, it has all four on for most of the time

I should write it more clearer. I have a single I_L value/compare signal and need to alternate it between the first and second leg.
To achieve his waveform

Must have dead time, although the picture is a bit confusing, seems it's activated by low level, check Idrain waveform.
You can't turn Q1 +Q2 or Q3+Q4 at the same time. Period.
Doing so would cause a complete short.
https://www.mdpi.com/1996-1073/13/6/1439/htm

[uer166]

Doing so would cause a complete short.

Nope, check circuit again. Shorting them out is same as turning on FET in an async boost converter, there is nothing misleading about the picture, and shorting them out is what builds up the inductor current.

[Miyuki]

I don't like it simply for the fact that there's no startup / fault limiting.  At best, it's swapping back and forth at nearly 50% duty cycle ...
Tim

It is not a big problem as it is meant as an MPPT stage for a solar inverter
So the supply is current limited to just a few percent above working current, and in the worst case I can just turn on all transistors and pass full current from panels indefinitely (not the best solution, but it won't damage anything)
But I was planning to add a buck stage in front of it for a bigger version with a higher input range, might have it here as a safety feature.

I was thinking a little more about the best controller configuration and the best way looks like simply taking 50% duty signal and just OR it with Boost signal, plus I can easily add that buck stage to it as it is independent

[T3sl4co1l]

Ahh that's nice then, as long as excessive amounts aren't wired up, or someone accidentally points a death ray at the panels or something, I don't know...

One of those things, it's an obvious failure point, but actually a tiny risk in practice, I suppose.  (Nice when that happens, eh?)

I was thinking a little more about the best controller configuration and the best way looks like simply taking 50% duty signal and just OR it with Boost signal, plus I can easily add that buck stage to it as it is independent

Hmm... yeah.  Indeed, interesting that, switching dynamics aside -- the shorting-mode switching can operate independently of the polarity switching, so you can do literally that, without even synchronizing the two.  You will in general incur additional switching edges that way (switching is the nonlinear behavior here!), so it's of course better with sync.

I know offhand, the, I think the AVR-DA Timer Counter A (TCA) can do a mode like this, but probably you'd choose TCD for its better control and fault features.  I know little about PICs but I have to imagine they've got similar functionality with the COG stuff, and, whatever the CCL equivalent is, if not actually the same things.  And sure, if you generate it the other way, you could even just use a pair of TCBs and CCL to do the toggle flip-flop, logical OR with a one-shot (reset by event from the master TCB), and whatever EVOUT or CCLOUT pins give your waveform.  With AC (analog comparator) routed to reset/fault the thing for peak current control.

Uh, which'll use up all six LUTs on a AVR64DA64 won't it, so you better not need anything else I suppose, but that should just do I think.  Or yeah, use TCD, or whatever other configs, there's lots of options as long as you aren't doing it at moderately high frequencies (under 200kHz is probably no problem at all?).

The main downside to AVR-DA in comparison to others is probably the relatively low clock frequency / low resolution timers.  At 24 (or "overclocked" to 32) MHz, running at 200kHz would be kinda chunky (~7 bits ENOB in the PWMDAC), and the control is going to start looking like a sigma-delta modulator.  (Counterpoint: just dither the LSB to get an already reasonably strong MPPT signal?)  In contrast to the XMEGAs that can do 128MHz "sub-cycle" resolution (which is, uh, because PLL clock source for the timers, I think it was?), or probably a lot of PICs that just run at whatever 64MHz or more and so have that available for timers too, or if any of them have similar multiplied clock or Vernier or whatever methods too.  (Which, AVR-DA's TCD is only 12 bits anyway, but does have a "dither" function to fill in the "missing" 4, so that's something too, I guess.)  And, plenty of ARMs with powerful and fast timers, needless to say.

The second downside to AVR-DA is the ADC is only ~125kSps.  For peak current mode, you don't need any acquisition to handle things on a cycle-to-cycle basis so that's fine, and for average current mode, loop BW < Fclk is okay, so that's fine as well.  But if you want more bandwidth to be certain, or more channels per controller or something, that would be a reason not to go this way.  (Do the other AVR-Dx have faster peripherals? I haven't checked.  But you'll be heavily limited by the CPU power, doing any kind of DSP at such a rate.)

Tim

[DavidAlfa]

Oh, sorry I missed the first inductor, you're right!
I was looking at it as simple push-pull transformer.

[Miyuki]

Ahh that's nice then, as long as excessive amounts aren't wired up, or someone accidentally points a death ray at the panels or something, I don't know...

One of those things, it's an obvious failure point, but actually a tiny risk in practice, I suppose.  (Nice when that happens, eh?)
...
And, plenty of ARMs with powerful and fast timers, needless to say.

Input fuse shall do the job

I wanted to run somewhere in the 100-150kHz range

I wanted to use Infineon's ARM-based MCUs but they are unobtanium as almost every ARM MCU nowadays
PIC and AVR are the only thing reasonably available in stock