PIC input circutry - Cap used as off timer

[ptricks]

ptricks,

Since the TRIS register is defined at POR and a clear command will take care of the undefined data in the PORT register, what glitch occurs on this line?  Even if the TRIS register somehow came up as an output after POR, it would only last until initialization, right?  That would only be a few microseconds.  Since the RC time constant is several orders of magnitude larger than that, it should have a negligible effect on the charge, right?

If the time being measured isn't critical then I guess it wouldn't matter.

I don't understand what you're saying about using the pin to measure capacitor discharge.  The resistor in-line with the capacitor limits current to less than a milliamp.  Surely Microchip intended the pin to be used for loads in this range?

I appreciate the feedback, but I don't see what prevents this from being reliable.

The best explanation is in the app note AN879 where they discuss the reason for implementing the ULPWU module when anyone could have just used a rc .
I don't know how timing critical your application is but something to consider.
http://ww1.microchip.com/downloads/en/AppNotes/00879D.pdf
--------------------------------------------------------------------
the problem is that a normal digital-input
structure consumes high-crowbar currents when a
slowly changing voltage is applied to it. The
digital-input structure will consume a few hundred
micro amps when driven by an analog voltage that is
not close to the rail voltages (VSS and VDD). To combat
these high-crowbar currents, Microchip has introduced
an ULPWU module, which provides an analog input
that can be used to implement a RC timer.
-------------------------------------------------------------------


Another app note AN607 recommends that if you have a pin as an input that has a voltage present at power off that it have a schottky between the pin and the voltage source to avoid a false power on reset.  I have seen chips that do not completely reset because of microamps of power on a pin.
http://ww1.microchip.com/downloads/en/appnotes/00607b.pdf

The only time I can find when Microchip recommends to use external pull-up/down resistors is after they mention internal resistors are disabled and pins reset to inputs on POR.  As Rufus said, an external source is obviously needed in this situation.

Microchip tends to scatter information between app notes, but the idea is that the chips state at power on should not be the basis for if a circuit works or not . Even more true with parts that have an internal voltage regulator.  In your situation it might not matter much but it is a bad idea to rely on that when designing a circuit.

[ptricks]

The pins have diodes to the supply rails a small power up glitch is not really significant when the pin has been diode shorted to the rails for seconds. Microchip have never documented their 5v tolerant pin ESD protection mechanism so no one has been told what 5v tolerant pins do and I have never experimented.

The pins are documented in many app notes. The diodes do not short the pin, in fact when power is off to the chip the power can flow into the pin and power the chip which is another reason not to depend on the pin to measure capacitor discharge in power off/on states.

[Rufus]

The pins have diodes to the supply rails a small power up glitch is not really significant when the pin has been diode shorted to the rails for seconds. Microchip have never documented their 5v tolerant pin ESD protection mechanism so no one has been told what 5v tolerant pins do and I have never experimented.

The pins are documented in many app notes. The diodes do not short the pin, in fact when power is off to the chip the power can flow into the pin and power the chip which is another reason not to depend on the pin to measure capacitor discharge in power off/on states.

If you have seen any documentation on the circuit providing +ve ESD protection on 5v tolerant pins please point me to it.

[Poe]

ptricks,

As I stated in the initial post, timing isn't critical.  So a nanosecond pulse from initializing shouldn't effect an RC with a time constant measured in seconds.  Although, for future designs, I would like to know where such pulses you mention originate and how long they could be.

I have a large load attached to the rails that effectively short them together, considering the high value of R in my RC.  So no worries about this cap causing an extended or incomplete reset.

The ULPWU module is intended for very low power designs where microamps of current are a big deal.  Luckily I can be as inefficient as I want with this design. 

The 'high' current from a slow transitioning signal on a digital input is the original topic of this thread.  I questioned whether this "crowbar" current damages the device or is it only a concern for low power designs where the additional microamps become notable.  Paul Price sided with the latter.

This really is the only valid concern I have at this time.


Daveatol,

What you describe is identical to the circuit I posted and plan on using. 

The Darlington circuit was an attempt to improve performance considering my size limitations, PIC clamping diodes and input leakage current.  Pin leakage current is 1uA, so I'm limited to around 500K ohms before there's a noticeable voltage drop when measuring the capacitor.  The clamping diodes short this RC when power is removed so the discharge time is simply ~RC.  If my capacitor can only be 10uF due to size limitations, that limits me to a 5 second RC.  Considering the max/min digital voltage levels and capacitor leakage... I'll be lucky to reliably detect an 'off' time of 2seconds.

The Darlington circuit solves this by isolating the cap when power is removed.  With power removed, the transistor is off and the capacitor's only path is through a reverse biased diode and the base collector junction of the transistor. 

Rufus posted a very clever suggestion where a charge is pumped into the main capacitor in discrete steps.  When power is removed, this cap is isolated by the small capacitor.  The main cap will still discharge through the diodes though.  It requires additional software and shorting of an I/O line, but the capacitor should last roughly twice as long as the Darlington solution.

[madworm]

Maybe adding an op-amp buffer would help.

I was thinking about the same method for user-interaction some time ago.

The MCP6001 does have clamping diodes on its inputs, but they don't go to the positive rail, so it might not discharge the storage cap when power is off.

[daveatol]

How about you charge the cap through the diode and buffer the cap voltage with a FET, e.g. 2n700x, which will pull down the PIC input. Circuits attached (the first uses two PIC pins while the other uses a single pin but suffers from increased quiescent current). Depending on cap value, you may wish to include a resistor in series with the diode, as before.

The FET gate leakage current is <10nA and the diode reverse current is <25nA @ Vr=20V (so <<25nA for Vr < 5V), meaning that the timing will be dominated by the capacitor and resistor values.

[madworm]

If you don't need a true analogue signal going into an ADC pin, the FET buffer looks very reasonable.

[Poe]

How about you charge the cap through the diode and buffer the cap voltage with a FET, e.g. 2n700x, which will pull down the PIC input. Circuits attached (the first uses two PIC pins while the other uses a single pin but suffers from increased quiescent current). Depending on cap value, you may wish to include a resistor in series with the diode, as before.

The FET gate leakage current is <10nA and the diode reverse current is <25nA @ Vr=20V (so <<25nA for Vr < 5V), meaning that the timing will be dominated by the capacitor and resistor values.

Wonderful.  This looks perfect.  I'll have to try it out.  Thank you very much.

[AlfBaz]

Aren't the boards already made? Just change the on/off switch to a three position one. Bottom = off, middle = on, top = momentary contact, ties MCLR to ground causing a reset, which you can verify in your startup code