just adding another blurb
I think that 'little lab' done with PT-100 by @peter-h
https://www.eevblog.com/forum/microcontrollers/stm-32f4-reading-cpu-temperature/msg4988782/#msg4988782seem to suggest that those readings are 'accurate' with a delta T of 5 deg C between the die and surface temperatures, at least for that chip
at the surface there is heat transfer by convention - i.e. air carrying the heat away.
hence, my suspicion is that blowing air at the IC or even adding a heat sink and blowing air may possibly pull the temperature gradient further apart
https://en.wikipedia.org/wiki/Thermal_conduction#Fourier's_lawQ = -k dT/dx
Q ~ heat flux (w/m2)
k ~ conductivity w/m-k
dT/dx - temperature gradient k/m
it seemed that I'm somewhat naive to simply take delta T and plug it in there, as at the surface, there is convective heat loss (air blowing at it)
in a sense this has to assume that the heat passing through that plastic is transferred out to air.
in a sense if at the surface is instead an insulator, dT/dx could practically be zero
so for that equation to 'work' the heat flow with that temperature gradient, that heat has to 'go out' at the exit e.g. the surface
if that is after all true then the surface would be assumed to be at room temperature, which is not true in 'that lab',
i.e. the convective heat loss (air blowing at it, or rather the lack of air blowing / still air) did not remove all the heat hence it is higher than room temperature.
so the temperature gradient may be greater if a heat sink is placed with air blowing at it to remove all that heat and "real" k (conductivity w/m-k) may be smaller than if simply the die temperature is simply read (with that built-in sensor) and that pt-100. e.g. 'crappy plastic'
![Laughing :-DD](https://www.eevblog.com/forum/Smileys/default/smiley_laughing.gif)
well, 'high thermal conductivity encapsulating materials' are possibly expensive
![Tongue :P](https://www.eevblog.com/forum/Smileys/default/tongue.gif)
note the other scenario, if after all a heat sink + 'good' thermal compound + air blowing at it removes all the heat, and that it turns out it is 'good plastic' a high k material
this setup may pull that cpu temperature much lower which is quite similar to what all that 'overclocking' and 'cpu cooling' 'enthusiasts' are doing.
e.g. if it is 'possible' to put a heat sink + 'good' thermal compound + air blowing at it, and bring temps to room temp then run that STM32F4xx at 300 Mhz?
![Laughing :-DD](https://www.eevblog.com/forum/Smileys/default/smiley_laughing.gif)
ok for that sake I ran my python script again
https://www.stm32duino.com/viewtopic.php?t=78and got these values
FHSE: 25 m: 5 n: 48 p: 2 (RCC_PLLP_DIV2) q: 5 fusb: 48.0 fcpu: 120.0
FHSE: 25 m: 10 n: 96 p: 2 (RCC_PLLP_DIV2) q: 5 fusb: 48.0 fcpu: 120.0
FHSE: 25 m: 15 n: 144 p: 2 (RCC_PLLP_DIV2) q: 5 fusb: 48.0 fcpu: 120.0
FHSE: 25 m: 20 n: 192 p: 2 (RCC_PLLP_DIV2) q: 5 fusb: 48.0 fcpu: 120.0
FHSE: 25 m: 25 n: 144 p: 2 (RCC_PLLP_DIV2) q: 3 fusb: 48.0 fcpu: 72.0
FHSE: 25 m: 25 n: 192 p: 2 (RCC_PLLP_DIV2) q: 4 fusb: 48.0 fcpu: 96.0
FHSE: 25 m: 25 n: 240 p: 2 (RCC_PLLP_DIV2) q: 5 fusb: 48.0 fcpu: 120.0
FHSE: 25 m: 25 n: 288 p: 2 (RCC_PLLP_DIV2) q: 6 fusb: 48.0 fcpu: 144.0
FHSE: 25 m: 25 n: 288 p: 4 (RCC_PLLP_DIV4) q: 6 fusb: 48.0 fcpu: 72.0
FHSE: 25 m: 25 n: 336 p: 2 (RCC_PLLP_DIV2) q: 7 fusb: 48.0 fcpu: 168.0
FHSE: 25 m: 25 n: 336 p: 4 (RCC_PLLP_DIV4) q: 7 fusb: 48.0 fcpu: 84.0
FHSE: 25 m: 25 n: 384 p: 2 (RCC_PLLP_DIV2) q: 8 fusb: 48.0 fcpu: 192.0
FHSE: 25 m: 25 n: 384 p: 4 (RCC_PLLP_DIV4) q: 8 fusb: 48.0 fcpu: 96.0
FHSE: 25 m: 25 n: 432 p: 2 (RCC_PLLP_DIV2) q: 9 fusb: 48.0 fcpu: 216.0 <<
FHSE: 25 m: 25 n: 432 p: 4 (RCC_PLLP_DIV4) q: 9 fusb: 48.0 fcpu: 108.0
FHSE: 25 m: 25 n: 432 p: 6 (RCC_PLLP_DIV6) q: 9 fusb: 48.0 fcpu: 72.0
FHSE: 25 m: 30 n: 288 p: 2 (RCC_PLLP_DIV2) q: 5 fusb: 48.0 fcpu: 120.0
FHSE: 25 m: 35 n: 336 p: 2 (RCC_PLLP_DIV2) q: 5 fusb: 48.0 fcpu: 120.0
FHSE: 25 m: 40 n: 384 p: 2 (RCC_PLLP_DIV2) q: 5 fusb: 48.0 fcpu: 120.0
FHSE: 25 m: 45 n: 432 p: 2 (RCC_PLLP_DIV2) q: 5 fusb: 48.0 fcpu: 120.0
FHSE: 25 m: 50 n: 288 p: 2 (RCC_PLLP_DIV2) q: 3 fusb: 48.0 fcpu: 72.0
FHSE: 25 m: 50 n: 384 p: 2 (RCC_PLLP_DIV2) q: 4 fusb: 48.0 fcpu: 96.0
FHSE: 25 m: 50 n: 480 p: 2 (RCC_PLLP_DIV2) q: 5 fusb: 48.0 fcpu: 120.0
![Laughing :-DD](https://www.eevblog.com/forum/Smileys/default/smiley_laughing.gif)
![](http://i3.ytimg.com/vi/MKZ2QhhcTpc/hqdefault.jpg)