[SAMC] RTC setup no longer works, but does when single stepping

[Simon]

well this chip has undergone some revision, there is now a 64MHz version I believe. I would assume that the CPU running at a lower voltage on the same silicon can only achieve a certain speed. But if a mere 6% more clock were to tip the TCC input over the edge I would doubt anything over 48MHz, as we already know the CPU is now rated for 64MHz, I don't know if it is due to a change in process that has allowed this but with the DPLL capable in theory of going higher, I'm sure I saw a spec somewhere in excess of 100MHz the mere 4 MHz between two peripherals designed to work at nearly 100MHz would have me doubting the entire thing.

I have run the TCC from 96MHz with no issue but of course this is at room temperature and like my experiments about 3 years ago on this chip you can even get away with one less wait state than you should at room temperature but of course not advisable in real life. Given this I would doubt that the TCC input is that marginal to have been dropped from 96 to 92MHz.

Now the ADC has a maximum frequency of 16MHz, at this frequency it will do the rated 1MSPS with the default 4 clock periods of sampling time. The minimum prescaler of the ADC is 2, so if I were to use 48MHz I would have to divide it by 4 as 24MHz is too fast, that would run it at 12MHz or 750kSPS.

The prescaler is 2 or 4 or a higher power of 2, 32MHz is the minimum frequency required to get the 16MHz, but 32 MHz cannot be obtained from anywhere but the PLL.

The SAMC seems to be a bit of an unappreciated gem, my apprentice eventually admitted once I got him to read the datasheet that it is a cool chip and he is an STM32 fan, I mean a micro that can run the CPU at 48MHz and have a 96MHz clock all from a RTC crystal, that STM32 garbage would require you to have a second crystal or you would have to contend with the RC clock. Whoever designed the SAMC thought of just about everything. It's just a pity that they did not make more effort with documentation.

[ataradov]

I've ran TCC at well over 100 MHz on SAM D11. But this was just a few devices at room temperature. I don't know how it might behave over the temperature and voltage range.

[Simon]

Well i will contact microchip and ask them about it just to be sure.

[Simon]

So looking through the errata, 1.25.1

FDPLL Unlock
When using FDPLL at temperature below 25°C, spurious DPLL unlocks (OSCCTRL.DPLLSTATUS.LOCK = 0)
may be detected while the FDPLL still adheres to the metrics described in the related electrical characteristics
chapters of the data sheet. During these unlock periods, the DPLL output clock is halted and then restarts.
Workaround
When using FDPLL at temperature below 25°C, enable the lock bypass (OSCCTRL.DPLLCTRLB.LBYPASS = 1)
to avoid losing FDPLL clock output during a false unlock status. The workaround does not avoid false unlock
indications, but it disables the gating of the FDPLL clock output by the lock status; therefore, the clock is issued even
if the FDPLL status shows unlocked.
Pseudo Code:
Set OSCCTRL.DPLLCTRLB.LBYPASS = 1
Set DPLLCTRLA.ENABLE = 1
Wait (OSCCTRL.DPLLSTATUS.CLKRDY = 1)
Set Source for GCLK with DPLL

So I have changed the code I got out of microchips harmony or whatever it was to take this out. I don't know if this was a cause for error before and why it was so illusive. I like the way it says that at temperatures below 25C..... well I know the world is getting hotter but 25C is fairly high for most days in say the UK. So if I understand correctly I just have to accept that the DPLL may not be accurate, not that I had anything in place to deal with it being inaccurate. I'm not sure what I would do other than having to change the period value of the TCC and set it up again and switch everything to the 48MHz RC clock and change all of the pre-scalers where it really matters like for comms.

[ataradov]

No, it will be accurate, the unlock indicator is spurious. This is why it says to basically just ignore it.

With LBYPASS=0 it would disable the output if it thinks that it is inaccurate, but it thinks wrong. Bypassing it you do run a chance that it if really unlocks, your clock may not be stable, but it is generally not easy to make it unlock.