Author Topic: STN LCD, power ON/OFF timing sequence  (Read 2977 times)

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Offline legacyTopic starter

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STN LCD, power ON/OFF timing sequence
« on: October 22, 2014, 12:13:02 am »


i do not really understand note1, what should i really care about power ON/OFF timing sequence ?
 

Online nctnico

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Re: STN LCD, power ON/OFF timing sequence
« Reply #1 on: October 22, 2014, 01:24:21 am »
Why? Well latch-up or drivers which aren't shut down with the power off.
There are small lies, big lies and then there is what is on the screen of your oscilloscope.
 

Offline legacyTopic starter

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Re: STN LCD, power ON/OFF timing sequence
« Reply #2 on: October 22, 2014, 10:33:19 am »
it says that the wrong sequence could damage the LCD, i do not understand what it means.
Also, what is problematic ?

it seams to me that the main importance things is that /DOFF should be asserted 50msec later the Vdd

do you confirm ?
 

Online mikeselectricstuff

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Re: STN LCD, power ON/OFF timing sequence
« Reply #3 on: October 22, 2014, 10:49:32 am »
It is mostly about not creating ugly visual artifacts on powerup, also avoiding DC bias on the LCD.
Unless you're turning on & off a lot, can usually be ignored
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Offline bktemp

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Re: STN LCD, power ON/OFF timing sequence
« Reply #4 on: October 22, 2014, 11:16:59 am »
Most important: Do not apply Vee when VDD is off. Vee without VDD causes latch-up and this will burn the driver ics.
To avoid remaining charges on the LCD, Vee should be turned off before stopping the driving signals. But this is often hard to do when power is switched off externally and is ignored in most designs. Modern LCDs are quite robust.
The easiest solution: Generate Vee out of VDD and do not use excessive capacitance at Vee, then it should be ok.
 

Offline legacyTopic starter

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Re: STN LCD, power ON/OFF timing sequence
« Reply #5 on: October 22, 2014, 12:55:19 pm »
thank you!

yes, it's a pretty old LCD made and sold around 2008 ages
 


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