PIC16F87 PWM formula

[GreyArea]

Hi, I must be tired because I don't seem to be reading this right.  I'm referring to the PIC16F87/88 datasheet where section 9.3.1 says "The PWM period can be calculated using the following formula." and gives.

PWM Period = [ (PR2) + 1 ] x 4 x Tosc x (TMR2 Prescale Value)

Further down, in table 9-3 is goes on to give an example at 20Mhz for 19.53Khz with prescalar and PR2 values of 1 and 0xFF respectively.

If I punch into my calculator 256 x 4 x 20000000 x 1 I get 20.48E9.  If I totally dropped the Mhz unit I'd get 20.48Khz but not 19.53.

My poor brain hurts where am I going wrong?

[Fratink]

That manual is not well written, but it's correct.

Tosc = 1/20Mhz (according to that table) (That's where your mistake is)

And Freq = 1/PwmPeriod:
1/(256 * 4 /20e6) = 19531

Hope that helps.

[GromBeestje]

That formula seems wrong. And when thinking about what is should be, one thing comes to mind. One usually divides the clock frequency by something. As it takes x ticks from the clock to do something.

This gives 20000000 / (256 * 4) = 19531.25.  Which seems to be the expected 19.53KHz

[Fratink]

The formula isn't actually wrong, you just have to search for what Tosc means higher up in the document.  T (time) vs F( frequency).  I had to search around to figure it out.

That formula seems wrong. And when thinking about what is should be, one thing comes to mind. One usually divides the clock frequency by something. As it takes x ticks from the clock to do something.

This gives 20000000 / (256 * 4) = 19531.25.  Which seems to be the expected 19.53KHz

[Ian.M]

Microchip datasheets are known to be prone to errors copy/pasted from previous datasheets with slightly different peripheral hardware.  Back in the PIC16C era there was such an error in the example PWM frequencies table and no-one has trusted those tables since even though the error was corrected in later PIC16F datasheets.

Trust the hardware!  Once you know that TMR2 resets on the next input clock cycle after a PR2 match, and that its got a 1:1/1:4/1:16 prescaler (officially) driven by the instruction & peripheral clock of Fosc/4, the formula is simple to derive from the block diagram^*, in this instance is correctly documented,  and (unless mathematically challenged) you will get the right answers.

* The block diagram is probably in the 'lies to children' category, as it doesn't make sense for the two low bits of the duty cycle register to be matched against two bits grabbed out of the prescaler or the instruction (Q) clock divider, as that would require a lot of extra gates to switch the equality comparator inputs to different prescaler and Q clock divider taps.  Its far more likely that the Timer 2 prescaler actually has Fosc as its input clock, not Fosc/4, and that there is an undocumented pair of flipflops between the prescaler output and Timer 2 that divide by four *AFTER* the prescaler and also provide the two low bits for comparison with the PWM duty cycle register.  The end result would be identical, just less silicon area used. 

[GreyArea]

Thanks all!  I really was tired lol - went to bed straight after posting and I realised that Tosc ≠ Fosc as I was drifting off.

I've added the (better) rearranged formulas to my notes - thanks again.