I will move to prototyping PCBs and away from the breadboard. Also I will try turning off the WiFi as you have suggested.
I have some 50mhz crystals coming in the mail today in addition to some NCP302HSN27T1G. I am going to attempt to move the clock and timing portion off of the ESP32s plate. It seems like with your breadboard success and with wESP32 moving to external oscillators, this may be the way to go.
https://www.mouser.com/datasheet/2/464/IDT_XL-Crystal-Oscillators-Datasheet_DST_20180907-961566.pdf
https://www.mouser.com/datasheet/2/308/NCP302-D-951758.pdf
1) I don't think the NCP302 reset chip is needed because the amazon 8720 board has nRST left floating/Not Connected and it works well. BTW, the datasheet contradicts itself, says it's got an internal power-on reset circuitry:
- "Integrated power-on reset circuit" (page 1).
- "Note 2.1 Configuration strap values are latched on power-on reset and system reset" (page 11)
- "Note 2.2 Configuration strap values are latched on power-on reset and system reset" (page 12)
- "When enabled, auto-negotiation is started by the occurrence of one of the following events: Hardware reset
Software reset
Power-down reset" (page 24).
- "Note: The Primary interrupt mode is the default interrupt mode after a power-up or hard reset. The Alternative interrupt mode requires setup after a power-up or hard reset."
- "The Primary interrupt system is always selected after power-up or hard reset"
- "Configuration straps are latched upon Power-On Reset (POR) and pin reset (nRST)." (page 39)
- "Varying the voltage up or down after the transceiver has completed power-on reset can cause errors in the transceiver operation" (page 38)
But then it says...
- "Hardware Reset
A Hardware reset is asserted by driving the nRST input pin low. When driven, nRST should be held low for the minimum time detailed in Section 5.5.3, "Power-On nRST & Configuration Strap Timing," on page 70 to ensure a proper transceiver reset. During a Hardware reset, an external clock must be supplied to the XTAL1/CLKIN signal.
Note:
A hardware reset (nRST assertion) is required following power-up. Refer to Section 5.5.3, "Power-On nRST & Configuration Strap Timing," on page 70 for additional information."
2) A weird thing in the amazon board is that it has LED1/REGOFF connected with 330R to VDDA which in principle would imply REGOFF, but the regulator is enabled. I removed 330R and put a 4k7 pulldown to be sure, and it made no difference. The high-ish forward V of the LED is doing the trick I guess:
3.7.3.1 Disabling the Internal +1.2V Regulator
To disable the +1.2V internal regulator, a pull-up strapping resistor should be connected from the REGOFF configuration strap to VDD2A. At power-on, after both VDDIO and VDD2A are within specification, the transceiver will sample REGOFF to determine whether the internal regulator should turn on. If the pin is sampled at a voltage greater than VIH, then the internal regulator is disabled and the system must supply +1.2V to the VDDCR pin. The VDDIO voltage must be at least 80% of the operating voltage level (1.44V when operating at 1.8V, 2.0V when operating at 2.5V, 2.64V when operating at 3.3V) before voltage is applied to VDDCR. As described in Section 3.7.3.2, when REGOFF is left floating or connected to VSS, the internal regulator is enabled and the system is not required to supply +1.2V to the VDDCR pin.
![No ethernet PHY connectivity with ESP-32-WROOM](https://www.eevblog.com/forum/index.php?action=dlattach;topic=212912.0;attach=864770;image)
3) When I look at CLKIN in the 8720 (with the low pass filter disabled in the scope) I see a signal that goes much below GND and above 3.3, so I've put a higher resistance in the esp clock output (gpio17) to make it be 3.3 peak to peak, from just above GND to just below 3.3, at the 8720 CLKIN pin.
4) You can use the Mac's ethernet port to do the tests, just have to enable internet sharing in the control panel. If you do that you can peek at the packets with WireShark and see exactly what's being sent (or not!) by the esp, and what's being sent by the Mac (and perhaps missed by the esp?). For example, when I have noise (in 100BASE-T mode + Wifi AP on) I can see the esp is missing many response ACK packets sent by the Mac and therefore retransmitting unnecessarily. If you see packets coming from the 8710 in the Mac you know TX is working. If you see replies sent by the Mac that the esp seems to be missing/ignoring, you'll know you've got a problem in RX.
![No ethernet PHY connectivity with ESP-32-WROOM](https://www.eevblog.com/forum/index.php?action=dlattach;topic=212912.0;attach=864776;image)