Similar timing waveforms are often encountered in radar applications, and are usually implemented in an FPGA or similar. One method I've found handy is to implement a programmable state machine with a block RAM to store the state transitions and the time delay to the next state transition. When the external trigger is received, the state machine starts from the beginning of the block RAM and 'plays back' the stored transitions. Resolutions of 10 ns are easy to achieve on older FPGA families, and 5 ns or shorter on newer ones. The waveform sequence may be easily changed by rewriting the block RAM contents.
One could also do a similar implementation using a memory block (SRAM, EPROM) and a counter.