But to ensure that the converter gets the data properly, the I2S signals (two clocks and one data for a DAC) must be synchronous to the master clock, and this is why BCLK and LRCLK are commonly divided down from MCLK.
You will probably want to run your STM32's port in slave mode. Some audio converters are capable of running in master or slave mode. In the former, the converter is the BCLK and LRCLK source. In the latter, something else is providing the clocks.
This is why I thought it was the best solution for low jitter because MCLK defines the sample rate for all signals though division. This is what sets it apart from SPI. I'm not sure why you are saying to run the port in slave mode unless you mean to use a more accurate external clock source? The AD5664R is just a simple DAC and cannot be a master since it isn't capable of clock generation.
There are some important differences between DACs meant for audio and those meant for other purposes (control, trimpot replacement, whatnot).
The AD5664R is a resistor-ladder DAC. It gets loaded with a digital word and you get an output voltage from it. The DAC output updates on the 24th falling edge of the clock, but only if the command you shifted in says to do so. SYNC has nothing to do with it -- all that is required is that SYNC is low for the shift to be allowed. This means that any jitter in the output is wholly dependent on the regularity of your shift clock, and specifically whether the last falling edge occurs on a regular periodic basis which is your sample rate. Good luck with that.
Another thing to note is that the AD5664R doesn't have any output reconstruction filter at all. The DAC output is a zero-order hold; that is, the classical "stair steps" that the know-nothings associate with digital audio. The correct low-pass filtering must be applied to get something even remotely resembling the sine wave you want. The point here is that the AD5664R is not going to give you a clean sine wave output.
An audio DAC uses oversampling techniques and sigma-delta modulation to generate a proper continuous-time signal from the samples. The reconstruction filter is built into the converter. As long as you are feeding samples to it the DAC will give you an output. A sine wave will look like a sine wave, not stair steps.
I've said that the modulator clock determines the jitter performance. That is the point. Some microcontrollers that have I2S modes for their synchronous serial ports are also capable of generating the proper modulator clock for the desired sample rate. Whether the jitter performance of that clock meets your requirements is up to you to decide. If your micro
can generate MCLK, it should also be able to use that clock as the source for the dividers that generate BCLK and LRCLK and drive your data line. In this case, the micro is the I2S master and the DAC is set up as the slave, with all clocks as an input.
If your micro cannot generate the MCLK, you need an external oscillator at that frequency. (They are common.) In this case, it is easiest to choose a DAC that can operate in I2S master mode; that is, given an input MCLK and you set up the part for a desired sample rate, it will generate the BCLK and LRCLK that you give to your micro, which is set up in slave mode. The micro will drive the I2S data line synchronously with BCLK. Note! The micro in this case
does not need MCLK! All it needs are the BCLK and LRCLK to know how to frame the bits and shift them out.
Anyway.
Given that you are generating a tone, you should consider ditching the AD5664R and use an audio DAC instead.