Hi all,
I'm dealing with a vintage MC6801U4 MCU that I need to program (I have the internal code) but I'm unable to do it since I don't have a proper programmer (very few programmers can handle this device).Therefore, I was wondering if I can use a MC6801/6803 in expanded mutiplexed mode 2 (internal RAM and no internal ROM).Datasheet of MC6801/6803 gives some hints on how to design the circuit so I made an attempt but it does not work.I attach my schematic and datasheets of MC6801U4 and MC6801/6803 hoping someone will help me.Thanks in advance.
First, you cannot program the MC6801U4. It has a mask ROM.
Yes, sorry.
But you can program the MC68701U4, which has EPROM (windowed DIP-40).
Yes, I know, but very few (expensive) programmers can do it and, anyway, I'm not interested in programmig the MC67701U4.As I said, I was thinking to replace these MCUs (6801U4 or 68701U4 with a regular 6801/6803 interfaced to an external EPROM that store the internal code of the aforementioned MCUs.
Your circuit should work but check the worst-case timing of the data reads from the EPROM. Depending on the processor clock speed and EPROM speed rating the data read from the EPROM might not met the set-up time for a processor data bus read. You could dispense with the /MEM_RD input to the 74138 decoder to eliminate the extra gate delay from IC5A and gain a little bit extra timing margin.
You should check that the mode setting inputs are not used by the S/W as normal I/O since you have hard-wired these to Vcc and Gnd.
Similarly, you need to check that I/O ports P30-37 and P40-47 are not used in the program. If the 6801U4 was used in the single chip mode then you would normally expect these I/O lines to be used. Since these lines are lost when connecting an external EPROM they would need to be replaced by external logic. The 68HC11 family had a chip specifically for this purpose, the 68HC24 port replacement unit, but I don't think the 6801 family had an equivalent chip.
There were also micros in that era with a piggyback ROM : a socket mounted on top of the processor. I have one somewhere : I forget which actual device it was but I think it was 6800 family.
So the micro was effectively in a bigger package, but it retained the DIP footprint of the masked package and added further pins on the top surface for a ROM data bus.
Your circuit should work but check the worst-case timing of the data reads from the EPROM. Depending on the processor clock speed and EPROM speed rating the data read from the EPROM might not met the set-up time for a processor data bus read. You could dispense with the /MEM_RD input to the 74138 decoder to eliminate the extra gate delay from IC5A and gain a little bit extra timing margin.
You mean connecting /G1 and /G2 input to GROUND instead of /MEM_RD?
You should check that the mode setting inputs are not used by the S/W as normal I/O since you have hard-wired these to Vcc and Gnd.
I don't know if they are used in software but in hardware these pins are connected to a pull-up resistor network.I attach schematics of the original hardware where the 6801U4 lies.Anyway, I designed a proper replacement board where I hardwired these pins to vcc and gnd on the socket of the 6801/6803 and not the socket of the 6801U4.
Similarly, you need to check that I/O ports P30-37 and P40-47 are not used in the program. If the 6801U4 was used in the single chip mode then you would normally expect these I/O lines to be used. Since these lines are lost when connecting an external EPROM they would need to be replaced by external logic. The 68HC11 family had a chip specifically for this purpose, the 68HC24 port replacement unit, but I don't think the 6801 family had an equivalent chip.
As above, I don't know if they are used in code but in hardware they are, see attached schematics.I attach also the internal program of the 6801U4, maybe someone can disassemble and study it.
There were also micros in that era with a piggyback ROM : a socket mounted on top of the processor. I have one somewhere : I forget which actual device it was but I think it was 6800 family.
So the micro was effectively in a bigger package, but it retained the DIP footprint of the masked package and added further pins on the top surface for a ROM data bus.
I have a few of these from Hitachi (6801). They were lower power and allowed for a larger memory than the Motorola part. They also offered OTP parts (CMOS) and there was a lawsuit Motorola brought against them. (all 80's/90's memory, so may not be accurate). Link shows what they looked like:
https://www.eevblog.com/forum/vintage-computing/pictures-of-vintage-ics/msg1436463/#msg1436463OP, I don't see how you would pull it off. I made my own ICE for the 6801 back in the day which sort of does what you are suggesting. It requires a few changes to the code and the I/O is not electrically the same.
Other's have asked about programming the 01 on this site. You may want to try using the search engine as see if anything useful comes up.
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https://www.eevblog.com/forum/microcontrollers/self-programming-the-mc68701-and-the-mc68701u4-(motorola)/
Your circuit should work but check the worst-case timing of the data reads from the EPROM. Depending on the processor clock speed and EPROM speed rating the data read from the EPROM might not met the set-up time for a processor data bus read. You could dispense with the /MEM_RD input to the 74138 decoder to eliminate the extra gate delay from IC5A and gain a little bit extra timing margin.
You mean connecting /G1 and /G2 input to GROUND instead of /MEM_RD?
Yes
You should check that the mode setting inputs are not used by the S/W as normal I/O since you have hard-wired these to Vcc and Gnd.
I don't know if they are used in software but in hardware these pins are connected to a pull-up resistor network.I attach schematics of the original hardware where the 6801U4 lies.Anyway, I designed a proper replacement board where I hardwired these pins to vcc and gnd on the socket of the 6801/6803 and not the socket of the 6801U4.
Similarly, you need to check that I/O ports P30-37 and P40-47 are not used in the program. If the 6801U4 was used in the single chip mode then you would normally expect these I/O lines to be used. Since these lines are lost when connecting an external EPROM they would need to be replaced by external logic. The 68HC11 family had a chip specifically for this purpose, the 68HC24 port replacement unit, but I don't think the 6801 family had an equivalent chip.
As above, I don't know if they are used in code but in hardware they are, see attached schematics.I attach also the internal program of the 6801U4, maybe someone can disassemble and study it.
From the schematic it appears that most of the pins used for the external EPROM are also used by the application circuitry and so need to be replicated in some external H/W. This will not be easy to design particularly as some of the port pins appear to be used in a bi-directional mode.
One possible source of ideas for this is to look at how Motorola did this in their evaluation boards if you can find the documentation for these. These evaluation boards would have allowed the necessary flexibility for using the I/O ports in all of the available modes but the external circuitry would have been quite complex, probably a dozen ICs or more.
The Motorola Microsystems MC 6801 Evaluation Module used a MC68701L and external EPROM.