Your circuit should work but check the worst-case timing of the data reads from the EPROM. Depending on the processor clock speed and EPROM speed rating the data read from the EPROM might not met the set-up time for a processor data bus read. You could dispense with the /MEM_RD input to the 74138 decoder to eliminate the extra gate delay from IC5A and gain a little bit extra timing margin.
You should check that the mode setting inputs are not used by the S/W as normal I/O since you have hard-wired these to Vcc and Gnd.
Similarly, you need to check that I/O ports P30-37 and P40-47 are not used in the program. If the 6801U4 was used in the single chip mode then you would normally expect these I/O lines to be used. Since these lines are lost when connecting an external EPROM they would need to be replaced by external logic. The 68HC11 family had a chip specifically for this purpose, the 68HC24 port replacement unit, but I don't think the 6801 family had an equivalent chip.