How to hook up 4 SDRAM chips to the SoC chip?

[technix]

This is about my AT91SAM9260 system. I have found someone selling MT46LV64M8A2 chips, thus allowing me to deck the SAM9260 out with its maximum supported 256MB of DRAM. The memory is arranged in a 32-bit wide bus, with each memory chip providing one byte of the interface, but share the same address and chip select line. Now is there any points I should be aware of when layering out the board, regarding the four memory chips? Keep in mind that the maximum bus speed here is SDR PC133.

Also there is the mixed width bus problem: the bus is shared with three devices: the 32-bit wide memory, the 8-bit wide NAND chip, and the 16-bit wide display controller (RAIO RA8875.) What should I be aware of when wiring this thing up, with the mixed width bus in place?

[nctnico]

AFAIK: recipy for dissaster. The problem with SDRAM is that both data and address lines are synchronous with the clock. DDR memory has seperate clocks for the data lanes which makes routing them much easier. In your setup the address lines will see a load of 4 (or more) devices while the data lines will have much less load.

[technix]

AFAIK: recipy for dissaster. The problem with SDRAM is that both data and address lines are synchronous with the clock. DDR memory has seperate clocks for the data lanes which makes routing them much easier. In your setup the address lines will see a load of 4 (or more) devices while the data lines will have much less load.

Understandable but there is no 2Gbit SDR SDRAM chips, and the 512Mbit ones are the largest still available. The SoC only have one SDRAM chip select, so I have to pile up the fanout to get memory in there.

[technix]

Is there a reason for using such an ancient chip? I would use an imx6 and a single higher speed ddr3 16x chip. Much better performance and much easier routing, including not needing the evil termination resistor banks.

Also check out RDA, they have a chip with 64MB of RAM and 4GB of flash, both copackaged with could in a single bga. External routing us super easy.

I have this SAM9260 project idea for a while, and there is a package constraint that no BGA or QFN allowed. If I am okay with BGA I would go straight for MT6797 (MediaTek Helio X20) which is a PoP package and a good performer. I am aware of the RDA chip too but BGA. (I actually bought the Allwinner V3s which comes in eLQFP128 with Cortex-A7 MP1 and 64MB LPDDR2, but it is a separate project.)

[nctnico]

How about using an SDRAM dimm module? These are dirt cheap and have termination resistors on board.

[marshallh]

For vanilla sdram you'll be fine. 4 chips, just route the cmd/addr/clk in a tiered tree fashion and you'll be completely fine.

[technix]

How about using an SDRAM dimm module? These are dirt cheap and have termination resistors on board.

I cannot find one. And those comes in 64 bit wide bus which is not supported by my chip.

[technix]

For vanilla sdram you'll be fine. 4 chips, just route the cmd/addr/clk in a tiered tree fashion and you'll be completely fine.

How to do this? And what about the data lines and the termination resistors?

[nctnico]

How about using an SDRAM dimm module? These are dirt cheap and have termination resistors on board.

I cannot find one. And those comes in 64 bit wide bus which is not supported by my chip.

Connect the 32 bit you don't need with resistors (47k Ohm) to ground. Problem solved.

[legacy]

Connect the 32 bit you don't need with resistors (47k Ohm) to ground. Problem solved.

Yup, good trick, it worked for me, too.