FPGA's, PLL's and Counters?

[sci4me]

Hi guys! So, I just got my second FPGA program (an 8 bit binary counter) working and now I want it to be automated so I dont have to press a button to make it count. Now, since the clock is 50 mhz, I don't really want to just use that as I won't be able to see the individual numbers. So, I added a PLL. I set it to divide by 25. I put that between my clock input and my counter, and well.. it doesnt work. All the LED's turn on... Not really sure why... Here is a picture of the block diagram:

The only code I typed for this project is the counter. I have confirmed it works, so it must be the clock or the pll. The clock pin is set to R8 which is the clock input for the FPGA. I also have confirmed that the LED's work so the PLL is the only thing left. I fallowed the guide in the user manual to create it but I changed the divisor to 25 in order to get 2Hz. So... idk what else could be wrong. Any ideas?

EDIT: opps, wrong pic... well, the wire goes to the PLL

EDIT2: Just for fun, I made a frequency divider out of DFF's. Took 24 of them. 32 LE's

[sci4me]

Okay, i am offically a total derp. 2 MHz not Hz -_- That explains a LOT.