On that page, scroll down to:
https://eewiki.net/pages/viewpage.action?pageId=15925278#VGAController(VHDL)-SignalTimingThat table shows how the pixel clock value is derived based on resolution, refresh rate, front porch, back porch etc.. Essentially, the horizontal front porch, sync, and back porch are in terms of pixel clocks.. so a line may be 640 pixels wide, but.. there are extra pixel periods off-screen (in CRT monitors, this is to give the beam a chance to "fly back" to the start of the next line) so for 16, 96, and 48 pixel clocks for front, sync, and back, thats an extra 160 off-screen "pixels", making each line 800 pixels.
Similarly, for the vertical front porch, sync and back porch, these are added as extra 'lines'. 10,2,33 gives an extra 45 lines, with 480 display lines, that's 525.
800 pixels * 525 lines * 60Hz refresh = 25200000 Hz. Or 25.2MHz.
I believe you can vary the front and back porch times to suit your needs. However, I'm sure the spartan 3 has on-board PLL's which will allow you to generate almost any clock you need.
I don't see how you can damage your board.. unless you provide it with over voltage on its IO's, or start desoldering things..