I looked into this a bit more. It would seem FNIRSI have made it easy to control the reset line of the MCU.
In looking for teardown pictures, I found a YouTube review and teardown by
Kerry Wong of the SG-003A, which seems to be fairly similar to the SG-004A. In that, you can see the NRST pin of the MCU (Geehy
APM32F103VCT6 in LQFP100) - right next to the two crystal oscillator pins - is connected to an unpopulated button footprint on the top edge of the circuit board.
Looking at another YouTube review and teardown by
DiodeGoneWild of the SG-004A, it appears that while they are using a different MCU (Artery
AT32F403A), it shares the same (or very similar) LQFP100 pin-out, so the NRST pin is in the same place. As there is a similar unpopulated button footprint on the board edge, it follows that even though the exact route of the trace coming from the NRST pin is obscured by passing to another layer through a via, it's highly likely it connects to this button just like on the SG-003A.
So, to hold the MCU in reset during flash SPI programming, you can likely simply short the two pads of this button footprint.
Here's also some more details from notes I made when I did a similar thing - programming an SPI flash chip in-circuit from a Raspberry Pi - a while ago:
If not already present, install flashrom utility:
sudo apt install flashromEnable SPI0 bus on Raspberry Pi:
1. Edit /boot/config.txt.
2. Uncomment (or add) line with "dtparam=spi=on".
3. Reboot Pi.
4. Confirm that /dev/spidev0.0 and /dev/spidev0.1 exist.
Connect SPI flash chip to Raspberry Pi GPIO header as follows:
Flash Pin | Pi GPIO Pin |
1 (CS) | 24 (GPIO8, SPI0 CE0) |
2 (SO) | 21 (GPIO9, SPI0 MISO) |
3 (WP) | [Jumper to VCC] |
4 (GND) | 20 (GND) |
5 (SI) | 19 (GPIO10, SPI0 MOSI) |
6 (SCK) | 23 (GPIO11, SPI0 SCLK) |
7 (HOLD) | [Jumper to VCC] |
8 (VCC) | 17 (3V3) |
Writing ROM image to chip:
1. Check chip responds to communication:
sudo flashrom -p linux_spi:dev=/dev/spidev0.02. Write data:
sudo flashrom -p linux_spi:dev=/dev/spidev0.0 -w <filename.bin>3. Verify data (optional):
sudo flashrom -p linux_spi:dev=/dev/spidev0.0 -v <filename.bin>Note that flashrom requires data file size to match size of flash. If ROM image is not big enough, pad with 0xFF bytes to required size:
srec_cat <filename.bin> -binary -fill 0xFF 0 <size> -o <filename-padded.bin> -binaryChange device argument to "linux_spi:dev=/dev/spidev0.0,spispeed=NNN" to set SCK speed (value N in kHz).
I mis-remembered before about default SCK speed - it's 2 MHz, but that's still rather fast, so you'll probably want to slow it down to a few hundred kHz.