CPLD wiring

[attie]

Hi Everyone,

I'm looking to use a CPLD as a bit of glue logic between a big processor and some FRAM.
Looking at the XC95144XL - it has 8 function blocks, each with a number of I/O pins, but none with enough for the full address bus.

My question is - Would it make most sense to connect the address/data bus lines to the CPLD based on the physical pin location (making the PCB routing easier), or based on the function block a pin is assigned to (potentially making the CPLD's internal logic tighter/more efficient).

In this situation I doubt that I'll be pressed against the limits of the CPLD's capacity, so this may come down to opinion... But I'm interested to hear your thoughts and reasoning.

Thanks in advance!

[nctnico]

The best thing to do is spread the address lines over several function blocks and leave a few pins unused. It depends a bit on the device utilisation and complexity of the logic you need. Ofcourse you should route the lines so you have a direct connection to the FRAM. That probably takes mixing address and data lines.