Oh ok, and I see the final assembly from 44kgk1lkf6u isn't the same, so that's down to the compiler doing it differently. In win10, I used ArduinoIDE, w/ an Uno as the ISP, to program the ATTiny13A, I'm not sure which avrdude got used.
And I see the RCALL isn't just a RJMP, there's a return address, from after the routine is done. But the only command I see like that is the RETI, in the section I'll mention below.
Here's the full assembly, and here's the 1st bit of IntelHex, :20 0000 00 09C0 16C0 15C0 15C0 13C0, those 2x RJMP 21 are correct.
0 RJMP 9 1 RJMP 22 2 RJMP 21 3 RJMP 21 4 RJMP 19 5 RJMP 18 6 RJMP 17 7 RJMP 16 8 RJMP 15 9 RJMP 14 10 EOR R1,R1 11 OUT 63,R1 12 LDI R28,159 13 OUT 61,R28 14 LDI R18,0 15 LDI R26,96 16 LDI R27,0 17 RJMP 1 18 ST X+,R1 19 CPI R26,100 20 CPC R27,R18 21 BRNE -4 22 RCALL 39 23 RJMP 62 24 RJMP-25 25 PUSH R1 26 PUSH R0 27 IN R0,63 28 PUSH R0 29 CLR R17 30 PUSH R24 31 PUSH R25 32 PUSH R26 33 PUSH R27 34 LDS R24,96 36 LDS R25,97 38 LDS R26,98 40 LDS R27,99 42 ADIW R24+1:R24,1 43 ADC R26,R1 44 ADC R27,R1 45 STS 96,R24 47 STS 97,R25 49 STS 98,R26 51 STS 99,R27 53 POP R27 54 POP R26 55 POP R25 56 POP R24 57 POP R0 58 OUT 63,R0 59 POP R0 60 POP R1 61 RETI 62 LDI R24,8 63 OUT 23,R24 64 OUT 24,R1 65 OUT 24,R24 66 SER R18 67 LDI R19,165 68 LDI R25,14 69 SUBI R18,1 70 SBCI R19,0 71 SBCI R25,0 72 BRNE -4 73 RJMP 0 74 NOP 75 OUT 24,R1 76 LDI R18,255 77 LDI R19,82 78 LDI R25,7 79 SUBI R18,1 80 SBCI R19,0 81 SBCI R25,0 82 BRNE 124 83 RJMP 0 84 NOP 85 RJMP -21 86 BCLR 7 87 RJMP -1
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So the only thing that leads to Word 25, the 1st PUSH, is the RJMP 21, from the 0x03 interrupt location for the Timer/Counter OverFlow interrupt. But there was no setup at all for the T/C, so why bother if it's all off ?
Then all the PUSH onto stack, LDS from RAM, a bit more math, STS to RAM, POP from stack, then there's an actual RETI.
Isn't it correct, that R1 only ever equals, and then their ST X+, R1 , with X=0x60 to start, just stores, 0, to the 1st 4 places of RAM ? So aren't they just using ST X+, just to do an increment ? But they also seem to store R1=0 onto the stack, then moments later, POP the stored 0, back into R1, but R1 should never change anyways. So why bother ?? And R0 was never set to anything, but they PSUH it to 0x9F the top of the stack (at that time), so is it assumed it starts 0 ? They purposefully set R1=0.
Assuming RAM 0x60-0x63 does have 0 in them, so are they using this to clear R24-R27, after just storing their values onto the STACK ? Then do some math to those R24-R27, then reload the stored values back from the STACK ??
And whats the timer interrupt doing, and all that section ? It seemed to me, the BRNE's and RJMP's would be enough to reload all REG's to the programs initial conditions, and then do the 2 countdowns, and loop forever.
All this is making more sense as I go, but yeah some of it seems silly, like an RJMP 0, followed by a NOP. If it's just for some timing reason, why not use 2x NOP, or 2x RJMP 0, or does it trigger something useful behind the scenes ??