Sixteen years ago in 2000, the Scenix (later Ubicom, later Parallax) SX-52 ran at 100 MIPS (100 MHz to be pedantic, but the only instructions taking more than 1 clock cycle were branches, taking 3, so 100 MIPS isn't far off). The SX instruction set is essentially identical to the Microchip baseline PIC (lawsuits ensued of course). Adding to the speed was a hardware stack that saved all of the important registers for interrupts, to save having to manually save/restore them as was needed on the PIC itself. The thing that crippled this was a lack of any real peripherals other than a few timers; the idea was that you had so much raw speed and deterministic timing that all peripherals could be implemented in software rather than hardware. You can imagine how well that actually went. (Parallax had the same idea with the Propeller: using its eight cores to implement virtual peripherals). I've used a SX-48 with interrupts occurring at several MHz, with plenty of processor time left over for tasks, quite a feat. Another nice feature: Programming and debugging occurred over the two oscillator in/out pins, so ICSP and ICD used absolutely zero I/O pins. Nice. Why don't we see more often? This MCU is now EOL, with the remaining SX-48 chips being cleared out by Parallax for pennies. Originally they were over $10 in quantity, and ~$20 in singles.