From wikipedia:
A sheet of paper or a few cm of air block alpha.
A sheet of thin metal or a few meters of air block beta.
X-Ray and Gamma takes much more material but don't have enough energy to flip bits in most MCUs with larger features than those found in consumer CPUs.
Cosmic is what you need to be concerned about, but at sea level is not a substantial issue.
Memory in many architectures is not linearly arranged. In other words, if you have byte 0 and byte 1 you don't have:
B0b0 B0b1 B0b2 B0b3 B0b4 B0b5 B0b6 B0b7
B1b0 B0b1 B0b2 B0b3 B0b4 B0b5 B0b6 B0b7
You typically end up with something more like this:
B0b0 | B1b1 | B2b2 | ...
B1b0 | B2b1 | B0b2 | ...
B2b0 | B0b1 | B1b2 | ...
Actual arrangements very. This helps to prevent 2-bit errors in a single byte or word.
Next many memory systems include some form of ECC. The simplest of which is a 2D parity check, which can correct any 1-bit error and detect any 2-bit error.
Here's an example with 16 bits of data:
The parity bit is the rightmost or bottommost bit in each row or column (on the other side of the line from all the other bits.
The parity bit is a 1 if there are an ODD number of 1s in the row or column.
The parity bit is a 0 if there are an EVEN number of 1s in the row or column.
0 1 1 0 | 0
1 0 0 0 | 1
1 0 1 0 | 0
0 0 1 1 | 0
_______
0 1 1 1
If a single bit flips:
0 1 1 0 | 0
1 0 1 0 | 1 <-wrong row
1 0 1 0 | 0
0 0 1 1 | 0
_______
0 1 1 1
^ Wrong column
So you kn0w the row and column of the error and can fix it.
If 2-bits flip
0 1 1 0 | 0
1 1 0 0 | 1 <wrong row
1 1 1 0 | 0 <also a wrong row
0 0 1 1 | 0
_______
0 1 1 1
^ This column looks correct.
The error is detected, but cannot be corrected. Any of the rows could have the error.
Of course, there are cases where multiple bits can be corrected, but it is guaranteed to work if any 1 bit is wrong.
If 2 parity bits are in error, you will detect the error, but you may make a bad correction.
There are other more robust ECC techniques.
https://en.wikipedia.org/wiki/Forward_error_correction