A quick 'n' dirty way to discover whether such an improvement to the PSU would be worth pursuing is simply to use a battery or batteries as a substitute for the original supply (removes the question of whether your hundreds of dollars worth of bench supply will introduce problems of its own or not).
This all sounds like a lot of trouble but if you're motivated enough to be asking such a question, then it's not really that much trouble after all.
JBG
Ok, thanks for the good info and battery suggestion. It does seem that an answer to determining how much impact external power supply ripple makes on the ADEV or other aspects of GPSDO operations is “try a battery.” Of course, the results might be somewhat influenced by the internal/integrated power supply circuitry of the particular GPSDO design. As previously noted, if for example, the internal board level design is spec’d at 150mV peak to peak ripple and noise, maybe a battery power supply won’t be able to show off it’s full impact. But I think it’s worth a try.
Results of 1 baseline test with respect to some simple startup observations: My BG7TBL seems to go from a cold start through a ~30 second period where it draws 1.2A and climbs to 1.3A; at about 30 seconds it starts drifting downward to less than .5A which it reaches in about 5 minutes and eventually (in about 60 minutes) it will settle at about 352mA. I don’t know for sure which comes first, the Lock symbol on the display or 352mA but I think they occur about the same time. At about 25 minutes the GPSDO reaches 360mA so the whole current descent process goes faster at the start and slower at the end. By about 28 minutes the LCD shows 10,000,000.0000 for the first time, then the 10 MHz signal bounces up and down a bit and eventually settles out at or near 10,000,000.0000 (at least that’s what the display says – who knows?).
(I have developed a new theory that the GPSDO warm up cycle takes somewhat longer to reach 352mA and Lock when I’m measuring it with my handheld DMM than when I just observe it without the DMM measuring current. Burden voltage? I was pretty sure it only took about a half hour to reach Lock without the DMM inline. With the DMM inline the last 8-10mA takes a relatively long time (~30 minutes?) before it reaches 352mA. Update: I now think the Lock occurs when the current settles to about 354mA, and then the GPSDO will bottom out at 352mA.)
If you plug and replug the BG7TBL while it is warm it will come back to 352mA much faster (a few minutes?). It consistently runs rock solid at 12.0V from startup to full warmup. This is all using the seller supplied wall wart that is spec’d at 12V, 2.0A.
So it would seem that with a 12V battery rated at 9Ah it might be possible to run a 12+ hour test. Maybe not long enough to learn long term impacts but maybe enough to learn something about the impact of external power supply ripple (or the lack thereof in the case of a linear supply) on short term GPSDO performance.
As a side note, it’s funny how a mild time nut addiction can lead to purchasing a $200 GPSDO followed by a second GPSDO and maybe a better SMPS and maybe a 12V battery and then maybe lead to justifying why it would be useful to purchase a bench DMM capable of recording and displaying trends. Stuff you previously didn’t know existed leads to the purchase of stuff you don’t really have a use for other than to observe and learn which leads to a need for more test equipment to measure stuff with more detail. I guess it's a cycle.
Wow! I can certainly relate to that final side note (as I'm sure most here would).
I believe it's something referred to as TEA addiction.
For myself, it took the form of my purchasing a cheap Siglent DSO last November by way of returning from a 30 year sabbatical in my hobby interest in electronics enforced by marital and family responsibilities when the availability of modern test gear much cheaper and better specced than the Tektronix kit I couldn't afford second hand examples of three decades back when two or three hundred quid used to be 'real money', was pointed out in the SED news group just over six months ago, citing the FY6600 thread in this forum by way of example of just how much you could now get for your money if you set your sights below the more well known profit... manufacturers such as Tektronix and Keysight.
Although this inspired me to buy a Siglent SDS1202X-E as a 'best bang for my buck' purchase (and that after doing without for thirty years, I really could now afford to treat myself to a piece of kit that could outdo the 2nd hand Tektronix offerings of three decades back for only slightly more than their then asking price), it took less than a week of ownership to realise that some sort of signal generator would now be a useful item to complement my 'scope purchase.
Initially, I did briefly consider a cheap Siglent 2 channel 30MHz AWG until I started comparing it against the FY6600 at just a quarter of the price. Despite all the negatives against the FY6600 in an almost two years old thread, it still appealed to me, especially as most of the criticism was due to the readily fixable penny pinching induced shortcomings, most of which I've now fixed.
One of the glaring deficiencies being the use of a "ten a penny" smd xo chip which would be of no detriment at audio frequencies but a severe annoyance for its lack of both accuracy and, even worse, stability for radio frequency work beyond the 100KHz mark, let alone, up in the Gods of the HF bands (3 to 30MHz).
At the time when I read Arthur Dent's OCXO modification contribution, I thought he was going just a little over the top and so settled for just a 3 orders of magnitude improvement in the form of a neat little 50MHz 0.1ppm TCXO oscillator power board I'd initially planned on extracting the TCXO from to drop in place of the original and rather execrable smd XO chip until my IR thermometer revealed that it was running at 50 deg C due to being just 10mm away from the three LDO regulators which were showing a 70 deg C temperature on the main board. I landed up mounting the whole module above the cooling fan to act as a deflector plate to keep it within just two or three deg C above room ambient, connecting it to the vacated XO smd chip location via a short length of small bore co-ax.
That gave me ample stability and accuracy to let me observe in sufficient detail what was happening with the NEO M8N module I'd bought as a starter item for my GPSDO project - I've since upgraded from the TCXO to a 10MHz OCXO with, as per Arthur Dent's OCXO upgrade, a 3N502 low jitter clock multiplier to generate the required 50MHz clock drive. That's now resulted in a free running OCXO calibrated within 300ppt with a drift rate over the past week or so of less than 200ppt (although I haven't been able to compare against a GPS reference for almost a week now). Suffice to say, it's been accurate and stable enough for me for use as a secondary reference in developing my DIY GPSDO project.
I mention this on account this new found interest in test and measurement kit has set me off on a seemingly never ending quest for better and more accurate gear, aka a GPSDO I can rely on and be proud of. Lately, in earlier postings here, I've been bemoaning my problems with getting a 5 volt 13MHz OCXO to phase lock against my cheap NEO-6M's 1kHz PPS (it's a make do for now substitute for the original M8N module I damaged with an injection of 12 volts into its PPS line a couple of weeks back).
All this time I'd been blaming first the XOR gate phase detector circuit and then the 4046 phase detectors for not doing 'their job' and, only now between this and the previous post, discovered a rather strange fact about the PPS signal from a NEO-6M (or at least this NEO-6M) when it's programmed to output a 1ms second pulse with a 50% duty cycle (1KHz sq wave).
Up until just prior to this post, I'd only ever quickly checked out the PPS and divider chain 1KHz output waveforms, preferring to monitor the 13MHz OCXO and FY6600 outputs when testing my crude PLL setup. It's only since I decided to take a much closer look in detail at the 1KHz signals going into the 4046's phase detectors, whilst monitoring the output voltage, that I've finally discovered the root cause of my crudely lashed up on prototyping bread board GPSDO test setup's failure to lock onto the GPS reference. It turns out to have been all to do with the NEO-6M's strange habit of slowly wittling away at the positive going pulse, shrinking its width until it disappears up its own backside to instantly reincarnate itself as a full fat sq wave, remaining so for the following five or so minutes before starting another cycle of shrinkage over the next 5 or so minutes.
If it hadn't been for the fact that I'd upgraded the FY6600 to an OCXO clock, I doubt I'd have been able to hand adjust the tuning pot on the OCXO to keep it close enough to the leading edge of the 1KHz PPS pulse to observe such weirdness (I'm not sure the original 0.1ppm 50MHz TCXO upgrade would have been enough of an improvement to have pulled off such a stunt).
It's no wonder the XOR gate failed to produce any meaningful failure behaviour let alone actually function as intended other than for relatively brief moments when it seemed to be locking in an offset fashion. The type 2 phase detector in the 4046 should have gotten round the non-square waveform issue but I'm guessing it was triggering on the trailing falling edge which would have been slowly happening at earlier and earlier times in the cycle for half of this 10 or so minute cycle before jumping back to a sq waveform for another 5 or so minute round of fun and games. No wonder it was slowly driving me round the bend these past few evenings (including midnight to 5 or 6 in the am if truth be known
).
Anyway, that's just a taster of the sort of process that sucks you ever deeper into the mad mad world of DIY test gear and electronic projects in general. BTW, I think, now I've got the use of the type 2 phase detector in that 4046 which doesn't rely on the waves being square, I'll have a go at reprogramming the NEO-6M to generate the narrowest pulse possible (10 microsecond, afaicr) and see how it behaves at that setting.
Obviously, I could try an inverting gate on the PPS line but I don't have any room on my prototyping breadboard for another TTL chip. Paraphrasing the famous line out of the movie, "Jaws", I think I'm going to need a bigger board. I think I might have one in the attic somewhere so I might have a look for it later on.
I've just taken a look and found it straight away! It's actually a "Microprocessor Trainer model ET-3400" made by Heathkit and it's complete with original manual. Taking another look at it now, I see the only item of value to me is the older style breadboard block that's simply stuck down onto the main circuit board to allow additional analogue circuits to be assembled (the 50/60Hz 120/240v transformer supply, according to the circuit diagram has two centre tapped secondary windings, one biphase rectified to produce circa 8vdc for the 5v regulator IC and the other with bridge rectifier to, presumably, provide a +/- 18 to 20v dc for the 12v + and - regulators which, according to the manual, are only for use with the prototyping breadboard that had been stuck, centre stage on the mainboard/panel.
They'd designed this 'Trainer' around a Motorola MC6800 cpu so it's no wonder I never even bothered to fit a plug onto its captive mains lead. If they'd more ambitiously based it around a Zilog Z80 or even its kakamaimee cousin, the Intel 8080, I might have deigned to fit the mains plug and have a play with it. With the association of the words "trainer" and "potty" in my mind and the fact that I was probably already writing Z80 assembler code to run on my S100 bus desktop machine at the time, it's no wonder it spent 30 years or so gathering dust in the attic.
I think it was a novelty item even back when I picked it up for cheap (or possibly even as a freeby) at some hamfest in the early to mid 80s. I was probably attracted to the prototyping breadboard (and possibly the plugged in TTL ICs) more than anything else. I suppose the case might be repurposed to stick a bunch of prototyping breadboards down on a replacement panel to the original mainboard and the transformer supplies replaced with more modern smpsu modules extracted out of redundant wallwarts and so on but that seems it might consume too much of my time right now and it may well have some value as a "Collectable" for all I know (it seems to be pretty well complete, only lacking its "Original Packaging"(tm)
). I might prise the breadboard off for my immediate needs since it's an easy enough 'restoration job' should it prove to have any value as a 'collectable'.
As it happened, I did use the right tool for the job, a flat bladed screwdriver, just not the right way since it proved to be screwed down to the panel rather than, as I'd assumed, stuck down with double sided adhesive tape. Still, it did save me having to remove a whole bunch of screws just to separate the top and bottom halves of the case to gain the required access to use the screwdriver as Ghod had intended (there was enough flex in the ventslots to grab hold of the loose screws with long nose pliers and with careful jiggling to extract them for reuse to attach the breadboard onto a plastic baseplate to prevent the contact strips being pushed out the underside.
I'm pretty certain it's a twin to another prototyping breadboard I already had but which I had managed to misplace at some time during the past 35 years or so. Making up a baseplate for my liberated breadboard will be worth the modicum of time and effort required since I can use it as an annexe to the existing board to support the luxuries of extra logic gates, hex Schmitt trigger inverters, CMOS RRO opamps and such like.
I've just taken the time to time the pulse width cycling on the PPS line with a stopwatch and it cycled in 11 minutes and 12 seconds during which time it would remain at a 50% duty cycle for a few seconds longer than 5 minutes, just as I suspected was the case. I think the addition of a hex inverter gate in the PPS line should fix the phase locking issue that's been torturing me these past three days or so.
I monitored the output voltage on the output of the LPF connected to the PD2 output line and it has been cycling from zero to 2.37 volts, shadowing the phase difference between the trailing edges of the OCXO divider and the PPS outputs. It would seem I have finally solved the mystery of this phase locking failure. As to what the best cure is, I've yet to investigate my options. An inverter should get me at least 99% of the way to a fix (possibly even 99.9% or better). I shall see.
JBG