I just set my NEO-M8N to output 8 MHz and checked the signal on the scope.
What i observe are a bunch of 20ns longer high-pulses every approx. 1 second.
Setting the frequency somewhere between 10 and 8000 Hz higher lets these pulses completely disappear.
Does this mean, that instead of adjusting the 24MHz oscillator, only the output is digitally adjusted?
I've been experimenting with a NEO-M8N module over the past 3 or 4 weeks since I bought one designed for RPi/Arduino projects and I can confirm that the module simply adds or drops one cycle of its 48MHz TCXO clock signal every half to five seconds or so, depending on where the temperature compensation has managed to steer it back towards its nominal frequency (retrace effect limits the desired effect of temperature compensation in this case).
The pulses are actually some 20.8333ns long (one period of the nominal 48MHz TCXO used in the M8N based modules). Like you, until I started monitoring the 2MHz jitter free output on the PPS line (I plan to multiply this up to a jitter free 10MHz) by triggering my scope with a 2MHz Sinc pulse waveform from my upgraded FY6600 AWG (adjusted by the 10 to 20mHz or so required to minimise the drift between the two traces), I used to naively think the M8N kept it synchronised to GPS time by adjusting the TCXO frequency. It turns out that it's not using quite as subtle a technique as that.
Keeping a 1Hz PPS pulse in sync with GPS time for hundreds of years can be readily achieved using this simple adding or dropping of a clock cycle to the frequency divider input whenever it drifts as much as one full cycle from sync with the GPS time datum, whatever the actual XO or TCXO frequency happens to be. This is exactly the same principle as using leap seconds adjustments to maintain synchronisation with UTC.
The rate at which these corrective phase shifts occur depends on how close to the exact (in this case, 48MHz) frequency the XO or TCXO happens to have settled on. I've seen the rate at which these corrections are applied vary from around two per second to one in more than five seconds with my own GPS module.
I've experimented with temperature changes by blowing cooling air over the module and using the warmth of my hands to warm it up to try and bring the background drift to a halt, slowing the frequency of the corrective jumps but the temperature compensation does seem to rather limit the effects in spite of the retrace issue. I suspect such experimentation with modules relying on just an XO rather than a TCXO will produce more extreme responses.
BTW, when you program PPS frequencies as low as 8 or 10KHz, the only reason you can no longer detect these phase shifts is simply because you've scaled them down by some three orders of magnitude from the 8MHz case where these phase jumps are a mere, yet still problematic, 15 deg. There's no way you're going to see 15 millidegree phase shift jumps on any 'scope you're likely to own.
If you care to go to the other extreme, you can program a jitter free PPS frequency of 12MHz and observe 90 degree jumps in phase.
[EDIT] Belay that! My bad, I managed to misinterpret your statement. I'll get back to this once I've repeated your tests with my own module.
[EDIT2] It looks like all you've done is introduce a non-integer divisor induced jitter component that's masking or smearing out the corrective pad/skip pulse corrections. Methinks the "cure" is worse than the "disease" in this case.
I was using a signal generator to trigger the scope on one channel with a Sinc waveform matched to the PPS frequency, adjusted to minimise the drift between them whilst displaying the PPS waveform on the other channel. When I triggered from the PPS signal set to 8010000Hz, I could see faint ghosts of jitter behind the more persistent trace. The best way to observe these corrective phase shifts is by triggering from a basic TCXO or OCXO clocked DDS AWG which can be adjusted to within milliHertz of the desired frequency. I'm guessing this was what you were doing. I'm only mentioning here and now it for the record to benefit any newbies reading this topic.
Using a long time constant PLL to multiply a 10KHz PPS frequency might be a neat way to filter out this phase noise without the expense of a VCOCXO module if you don't mind the lack of a one ppb or better 'hold over' feature, typical of a full blown GPSDO. The NEO M8N can be programmed to output a matching frequency from its TCXO in the event of loss of lock on the GPS and/or Glonass satellite constellations but frequency accuracy will be degraded to that of the TCXO which may be anywhere from +/- 100ppb in error with a 10 to 30 ppb variation with temperature. Better than nothing but nowhere near the normal locked frequency output. However, this may be a cost effective starting option, there's nothing to prevent you adding a VCOCXO module at a later date while you're in charge of the design and build of your very own DIY "GPSDO".
If you're after a cheap solution, a clever way to get a lock/unlock indicator without the minor expense of an Arduino nano is simply to program the free running output to a duty cycle of say 10 to 25 percent and monitor the average DC voltage with a comparator to drive the indicator LED (assuming you use a 50% ratio for the locked frequency output). Since this signal is going to be processed via a PLL and/or divide by two flip flop stage, the final output will remain a perfect square wave regardless[1].
In this (navigation centric) application, there's simply no call for anything better (ie production of an ultra low phase noise polluted reference frequency) hence the need to add a separate VCOCXO disciplined with a long time constant PLL to filter out these phase jumps to obtain an ultra low phase noise polluted reference clock output fit to feed into the EXT 10MHz reference sockets on the rear panels of T&M and communications gear.
Also, the benefit of using a disciplined VCOCXO module is that it can offer a hold over accuracy and stability matching the locked state whenever the GPSDO unit loses lock with the satellites for any reason, keeping it to within nanoseconds of GPS time over periods of hours or even days provided power to the GPSDO isn't interrupted in the meantime.
However, I'm investigating a possible way to eliminate the expense of a separate VCOCXO module via the use of a 3N502 ultra low jitter PLL multiplier chip and an effective filter to turn the square wave output into a pure sine wave signal. The only fly in the ointment with the 3N502 clock multiplier chip is that, buried deep in the data sheet, it's only specified to a lowest output frequency of 14MHz in spite of the lowest clock input frequency being 2MHz and it having a lowest multiply option of two leading me to infer otherwise. I may need to multiply a jitter free 4MHz PPS signal up to 20MHz and divide it back down to 10MHz with a divide by two flip flop to hopefully get a more acceptable quality of 10MHz sine wave output.
If this idea of mine fails to produce the goods, then at least I'll know why there's no cheaper alternative to investing in a VCOCXO module which won't leave me quite so distressed by the expense of such an "essential component", especially when this is tempered by the fact that it will provide my GPSDO with a much superior hold over performance than that of the module's own built in TCXO.
[1] With this in mind, there's no reason why you'd need to stick with a 50% duty cycle on the locked frequency output, you could use a 67% setting for the locked output and a 33% setting for the unlocked output, making the difference between the average DC voltage levels even easier to distinguish by the lock/unlock comparator circuit.
JBG
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