The simplest and smallest voltage reference

[zlymex]

(I'll try to describe this simple by saying nothing)

[quarks]

very simple indeed.
Did you select your batch to get 9.99998V or was it just luck?

[zlymex]

very simple indeed.
Did you select your batch to get 9.99998V or was it just luck?

Yes, I selected that one from a batch of 110.

[Theboel]

very simple indeed.
Did you select your batch to get 9.99998V or was it just luck?

Yes, I selected that one from a batch of 110.

Ups a lot of job to check 110pcs  and not cheap any more compare to TiN LTZ1000 
what the average of the rest ? lets say 4pcs from random batch
If You don't mind to turn it on for a long time to see drift after let say 3 month, please.

[zlymex]

Ups a lot of job to check 110pcs  and not cheap any more compare to TiN LTZ1000 
what the average of the rest ? lets say 4pcs from random batch
If You don't mind to turn it on for a long time to see drift after let say 3 month, please.

It took me about 2 hours checking these. The voltage accuracy of these batch is very good, most of them are within 9.996V to 10.002V bracket.
I'll parallel 100 of them to get the smallest noise for solid state voltage reference, better than 10 LTZ1000 in parallel.

[zlymex]

Measured by my 3458A, already warming up for >24 hrs, temperature is around 21 deg C.
 - Warming up time is good, 3 minutes to within 0.3ppm.
 - Noise is good, 0.04ppm rms(2.2uVpp in 3 minutes).
 - Usable voltage is good, minimum 12.5V, better to be 13.0V or above.
 - Voltage coefficient is -1.6ppm/V at 13.5V. Supply should be regulated.
 - TempCo is good, -0.63ppm/K(measured chart not shown).

[ZeTeX]

Why the green wire?
use zip ties! 
Also, would it be better to pot the voltage ref like this:

This way its more rugged?

[zlymex]

Why the green wire?
use zip ties! 
Also, would it be better to pot the voltage ref like this:

This way its more rugged?

Good idea. Now the reference is potted and screened. The green wire was soldered to the bottom of the aluminium can before the potting.
The can is actually an electrolytic capacitor measured at 11mm in height and 8mm in diameter.

Edit: the green wire is for the fastening. Without it, other wires will be individually bent or twisted and soon the solder joints and leads of AD587 will be broken. Those wires are only 0.6mm in diameter, I found no zip ties of such small size.

[ZeTeX]

Why the green wire?
use zip ties! 
Also, would it be better to pot the voltage ref like this:

This way its more rugged?

Good idea. Now the reference is potted and screened. The green wire was soldered to the bottom of the aluminium can before the potting.
The can is actually an electrolytic capacitor measured at 11mm in height and 8mm in diameter.

Using a capacitor as a "enclosure".. brilliant, I have to try it!

[zlymex]

Using a capacitor as a "enclosure".. brilliant, I have to try it!

Thanks! The problem might be the soldering to aluminium. I had a special solder flux allowing me to do that.

[Edwin G. Pettis]

Zlymex (#4 post),

There are problems with your idea of paralleling a large number of chips together, first after paralleling about 5 or 6 of them, the summation network is going to swamp out the noise from the Vref chips, the law of diminishing returns puts a limit on how many you can parallel and get improving noise specs.  You will reach a point where the noise level will begin to increase instead of decrease....NIST tried this technique to see how far they could improve the noise figure.  Even using PWW resistors will still run into a limit.  Secondly, if these chips are from the the same production run (or very close runs), you may find that they all have very similar drift characteristics, in other words, they all may move in a similar direction with time, this would cause the averaged output to likely wobble as much or more than any single chip in the group in effect worsening the drift.

This paralleling effect is also valid for the LTZ chips, paralleling more than 5 or 6 of them will not significantly improve the noise level.  This is where theory runs into a brick wall, the math says you can keep improving the noise figure but it isn't going to happen in the real world.

If you really need less noise than a LTZ gives, you could stack two LTC6655-5 chips in series, the price you pay is less stability over time but it would be better than trying to pile a bunch of AD587s together.  Over all, considering the specifications for a Vref, you cannot beat the LTZ1000 with any other chip, for stability vs. noise it can't be beat otherwise there would be other Vref chips being used in the best references available sans the quantum standard.  You can't get something for nothing, there are always tradeoffs.

[zlymex]

Zlymex (#4 post),

There are problems with your idea of paralleling a large number of chips together, first after paralleling about 5 or 6 of them, the summation network is going to swamp out the noise from the Vref chips, the law of diminishing returns puts a limit on how many you can parallel and get improving noise specs.  You will reach a point where the noise level will begin to increase instead of decrease....NIST tried this technique to see how far they could improve the noise figure.  Even using PWW resistors will still run into a limit.  Secondly, if these chips are from the the same production run (or very close runs), you may find that they all have very similar drift characteristics, in other words, they all may move in a similar direction with time, this would cause the averaged output to likely wobble as much or more than any single chip in the group in effect worsening the drift.

This paralleling effect is also valid for the LTZ chips, paralleling more than 5 or 6 of them will not significantly improve the noise level.  This is where theory runs into a brick wall, the math says you can keep improving the noise figure but it isn't going to happen in the real world.

If you really need less noise than a LTZ gives, you could stack two LTC6655-5 chips in series, the price you pay is less stability over time but it would be better than trying to pile a bunch of AD587s together.  Over all, considering the specifications for a Vref, you cannot beat the LTZ1000 with any other chip, for stability vs. noise it can't be beat otherwise there would be other Vref chips being used in the best references available sans the quantum standard.  You can't get something for nothing, there are always tradeoffs.

Thanks for the concern, very much appreciated. Here is my explanation.

I have bought 300+ pieces of AD587, very cheaply, so I'm going to try it anyway. On the other hand, LTC6655 is much more expensive, uneconomical to parallel or in series tests for even smaller numbers.

In theory, the noise reduction is inverse proportional to the square root of the number paralleled. Indeed there is a brick wall, which is zero.
BTW, there is no limit for harmonic series 1+1/2+1/3+...+1/N+...


In practice, if people do find a none zero limit when increase the number of paralleled devices, probably because of the following:
 - the circuit is too complex or/and the size is too large for each unit. In both cases, more risk to introduce additional noise.
 - something wrong with the parallel circuit/network
 - voltage diverse of paralleled devices
 - limitation of test equipment
 - limitation of test method

There are brilliant people and good ideas at NIST but there are still poor ideas there. For instance, design and use of a very low sensitive(and unknown sensitivity) Warshawsky bridge(NIST Technical Note 1458, page 22) and have to amplified many times(100000) later. That's where noise might coming from.
By 'unknown', they don't know the sensitivity by design or by calculation, they has to test it by additional resistors and switches(c, e, d, f, S1, S2).


Quantitatively speaking, the target noise I'm plan to achieve is 0.4uVpp(0.1-10Hz), which is
 - one tenth of an AD587
 - one third of that of a LTZ1000
 - much larger than Johnson noise of an 100 Ohm metal film resistor
 - larger than that of many opamps

As in the case of LTZ1000 parallel, there is one instance: Datron/Wavetek 7000 system. They specify the noise for single unit as <0.03ppm, ten paralleled as <0.01ppm, which follow the theory very closely.

The pure purpose is to test, of how noise reduces by parallel. There are evidence that LTZ1000 is not the lowest noised solid state reference(single unit). I've bought some of such devices. Preliminary test showed that it outperform LTZ1000 as far as noise is concerned.