I'd been planning to add thermal cutouts to the RVFRs in my 5065As for a while, and decided to do it with thermistors and an MCU rather than simple thermal fuses in order to support data logging as well as overtemp protection. The thermistors are placed at more-or-less arbitrary locations under the shield covers at both ends of the physics package, so they don't return very accurate readings, but they are OK for the original intended purpose of detecting thermal runaway and can give a reasonable view of relative temperature changes for logging purposes.
In the plot above, the controller is monitoring the second harmonic and photo readings as well as the thermistors at both ends. As it turns out, the cell temperature has a massive influence on the photocell current and 2nd harmonic levels as well as the frequency.
Normally this unit runs at an (indicated) cell oven temperature near 43.5C, photo I near 10, and 2nd harmonic near 30, but at the time I started the plot above, the cell oven had been disabled for a half-hour or so and allowed to cool down. Notice that the 2nd harmonic level starts out near 70(!) at left, corresponding to a reported cell temperature of about 40.5C.
As the oven cools further the 2nd harmonic level starts to drop; by 39.0C it is back to the ~30 vicinity. At that point I turned the cell oven back on, and you can see it warming up in the second half of the plot. The second harmonic reaches a clear peak just below 40C -- unfortunately at a point where the df/dt is as high as it ever gets -- and then falls back down to 30 as the oven approaches its final temperature.
As an experiment, I changed A11R5 from 430 ohms to 560 ohms to bring the cell oven temperature down to a level near the 2nd harmonic peak, and performed a basic realignment. A7TP2 is capable of about 4V peak-to-peak on this unit (and always has been), but I'm not sure where it ended up. The C field obviously had to be readjusted to take out the frequency error. There seems to have been little or no improvement in short-term performance, though:
Note that these two traces were taken over five years apart. The apparent improvement below t=0.2s is likely due to a better loop gain setting, and isn't relevant here. Same for the apparent degradation beyond t=40s, as the DOCXO is what is being measured beyond t=~5s.
It's hard to judge long-term performance immediately after power-cycling and realignment, but I don't see any evidence that it has gotten worse. I wouldn't be surprised if lowering the cell oven temperature actually does make it a little worse, though, given the increased frequency tempco at the new setting. After it settles down for the next few days I'll do an overnight run against the other 5065A and a GPSDO.
So, Corby -- is this effect the same as what's being observed when the TED current is adjusted? Or would you expect the cell temperature and TED temperature to have independent effects?