T.C. + Hysteresis measurements on brand new LT1027DCLS8-5 voltage reference

[Andreas]

Hello,

The result of the 33 hours stability measurement.

the popcorn noise is still on ADC26 (perhaps not so frequent fluctuations)

All in all: ADC25 has moved slightly worse (most probably due to the larger temperature gradients)
ADC26 slightly better
ADC21 appears more long term stable as in the previous 24 hours measurement even if the shape of the noise over time has not changed.

But I think all is just statistical variation. (so would need more observation time).

I have started ADC24 to be included in the measurement. (after several months being switched off).
But at the moment the daily drift is more in the 1-2 ppm range.
I think it will need a week to stabilize until a stability measurement can be done.

with best regards

Andreas

[Andreas]

Hello,

next 31 hours stability measurement.
After ADC24 now had the chance to stabilize somewhat.

ADC21 (LT1027DCLS based) dead bug mounted is now rather stable. (nearly as ADC25)
ADC24 (LT1027DCLS based) with slotted PCB still drifting medium+long term
ADC25 (AD586LQ based) still the "best"
ADC26 (AD586LQ based) suffers from popcorn noise.

with best regards

Andreas

[branadic]

Looks like ADC24 has some temperature dependence superimposed on its drift.

-branadic-

[Andreas]

Hello,

you are right.
it looks around 1 ppm over 2.5 deg C or 0.4ppm/deg C.

So either at the T.C. calibration something went wrong
or the T.C. characteristic has changed over time.
(which would be the first of all my ADCs where this gets visible).

with best regards

Andreas

Edit:
adjustment was ok but ADC24 is suffering from a relative large hysteresis over temperature as you can see here at calibration check. (and of course some days before the actual calibration).

https://www.eevblog.com/forum/metrology/t-c-hysteresis-measurements-on-brand-new-lt1027dcls8-5-voltage-reference/msg1037076/#msg1037076

[branadic]

I can't identify the hysteresis you mentioned. Have you tried compensating the data by temperature afterwards? What is left then?
Still have my problem interpreting the allan plots, as I don't see any quantization noise nor random walk in the diagrams. The values are directly starting with bias stability, what is somewhat unusual as the ADC should introduce some quantization noise and I would expect some random walk by the reference itself. Am I'm wrong?

[Andreas]

Hello,

for me the hysteresis is clear visible:
at 30 deg C I have 15 uV or 4 ppm hysteresis at the ADC input (after 2:1 divider).

https://www.eevblog.com/forum/metrology/t-c-hysteresis-measurements-on-brand-new-lt1027dcls8-5-voltage-reference/?action=dlattach;attach=258961;image

For the Allan diagrams:
Be aware that with my ADCs I use the 1 minute average values. (1 minute integration time).
So around 330 measurement values averaged which is also near the maximum stability already.
So the quantisation noise and the angle random walk are already removed from the diagram.

When doing the Alan diagram with raw values I can see the angle random walk with sqrt(n) decrease.
But then I am starting at 2uVeff noise. (not at 0.2uVeff as in the 1 minute integration time).

A different picture is shown when I use either a short (zero volts) or the own reference voltage.
Then I have a looooooong falling sqrt(n) measurement.
(see example with ADC14 measuring own reference with a 1:1 buffer amplifier and raw data)

with best regards

Andreas

Edit: quantisation noise is probably not visible with my ADCs since the LTC2400 has 24bits + 4 sub-Bits further I gain around 4 bits due to the averaging over 1 minute. So quantisation noise would be at nV.

[branadic]

Okay, taking this additional picture into account I understand your conclusion. Have you tried multiple temperature slopes one after the other? Does hystersis decrease or increase? With constant hysteresis the residuals should show some ellipse but it looks like your residuals show some helix, so there seems to be some previous history left.

Concerning Allan diagrams: Didn't notice that and was thinking if this different pictures are resulting from using voltage values as frequency data instead of phase data in Plotter. But with increased averaging this makes sense. Thanks for explanation.

-branadic-

[Andreas]

Hello,

now we have around 2000 hrs on ADC25 + ADC26
Both AD586 based ADCs have drifted around 1-1.3 ppm/kHr.
It will still take some time until they reach 1-2 ppm/year.

ADC21 in comparison (LT1027LS8 based) has drifted 6 ppm or 3 ppm/kHr.
And since ADC21 + ADC24 have been already aged for 3 kHrs this is for 4th and 5th kHr of ADC21.
-> nearly no chance to get into the 1-2 ppm/year region.

ADC24 (on slotted PCB) has been included into the measurement for its 4th kHr. Average drift is similar to ADC21 but with more noise.
Interesting find:
I had accidently put ADC24 up side down on the table for the first week which can be seen as up to 2ppm/day variations.
After  1 week it was put in normal orientation and the variations calmed down.
But I am not shure if this was really the reason since the "noise" of the measurements increased later again.

with best regards

Andreas

[Noopy]

I took some more pictures of branadic´s LT1027:

https://www.richis-lab.de/REF07.htm

Not really better but different. 




Besides the voltage adjusting the die has fusible links in the upper right corner. The links connect resistors to the opamp. Probably some adjustment of the opamp characteristics.




The Zener. They have two of them. The upper one seems to be responsible for some constant currents.




Does anybody know what that big thing does?

[magic]

 

wtf1, wtf2 are the resistor networks in the corner near the factory test pads.

[Noopy]

wtf1, wtf2 are...

 



...have to think about that… 

[razvan784]

Does anybody know what that big thing does?

Looks like a huge diode in series with some elements used for post-packaging trim, maybe Zeners than can be zapped (short-circuited with a high enough voltage & current). I don't know why they're not using metal fuses like in the left section, maybe those require much higher current? Or maybe they leave contamination behind?

[babysitter]

Any idea who or what JS is?

[iMo]

  .. and, again 3 pins with an unknown functionality (but no fuses this time).. 

[Noopy]

.. and, again 3 pins with an unknown functionality (but no fuses this time).. 

In my view there are at least two fuses next to two of the bondpads connecting the "not used" contacts. They look like these smaller "poly-fuses". 

[iMo]

Hmm, I do not see any around the 3 bonded unused pins..

[magic]

Branadic's own photograph shows this device in more detail and it doesn't look like any of the fuses.

There is more of them, here's one in the middle of the die.


By comparison with transistors, I would say that the outer "frame" with dark and thick borders is N+ doped over bare isolation island (it looks like NPN collector connections) and the central rectangle is P. The P appears to be contacted by both metal traces entering the device, so it functions as a resistor, though a suspiciously thick and short one. The island is biased to the potential of the metal which contacts N+. That's normal for resistors, though nobody goes to such effort to distribute that potential over the whole perimeter of the resistor with N+ diffusion because no current normally flows through the isolation island.

Maybe I'm wrong and the doping is different. Or maybe the isolation island forms a diode with the substrate to clamp the input to GND. Total speculation

At any rate, somebody tell me how that circuit at the bottom of the input stage works

[Noopy]

Hm... Seems that I was wrong... 

[magic]

I found the picture of this IC on my computer and decided to take another look.

I think you are right, these small structures like the one I posted above are zeners, possibly acting as fuses for trimming. If you look closely you may notice that there are thick lines visible on metal wherever it crosses the border of N+ diffusion. However, there is no line between the N+ frame and the metal finger which reaches to the P diffusion inside the frame. Therefore, N+ must also be present in that finger, under the metal. The contact window covers only the N+, not the P. The P is contacted by the lower metal trace. Together, they make a diode with low reverse breakdown.

I attach a picture of diode-strapped NPN for comparison. Here the collector contact N+ diffusion (right) also partly overlaps with the base P diffusion (left). The edges of both diffusions can clearly be seen on the overlap area. The whole area is covered by metal and there is a contact window extending over both parts.

So what we have in the upper right corner of the die is a bunch of resistors and some (presumably) fuses and DNC pads. Parts of the circuit are obscured by bonding wires. There seems to be some sort of connection between the pads and ground, but I think it's not very low resistance because in such case the pads wouldn't really be necessary. The resistors go to the wtf1,wtf2 points in that weird transistor network which biases the emitters of the differential pair.


The big structure with multiple fingers is different. The central part appears to be a P diffusion because its color is the same as the P parts of the buried zener. There seems to be an N+ diffusion aligned exactly under the metal rectangle, because there is a line where the rectangle joins the trace coming from the DNC pad. So it looks like a diode-strapped NPN so far. But the emitter fingers leave the base area and join an N+ frame which surrounds the base and makes contact with the collector.
 

A similar structure (plus another zener zap?) is found near the TRIM pad in the bottom right corner.


Regarding the reference, it seems to roughly follow the datasheet schematic. It consists of the buried zener and NPN located on the central axis on the left side. The NPN is a Vbe-multiplier whose output is averaged with that of the zener. The topmost resistor in the chain is adjustable by all those fuses on the left side. The divider chain has a few more taps and some other transistors hang off of them. The PTAT generator in the bottom left corner appears to actually be a proper bandgap reference (Brokaw cell topology), because I simulated the circuit with transistor and resistor ratios as seen on the die (4:1, 8:1) and it produces close to 1.2V, depending on which transistor model I choose.