Author Topic: Review Design for Inductance Tester  (Read 1914 times)

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Offline CrossphasedTopic starter

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Review Design for Inductance Tester
« on: June 08, 2020, 12:59:45 am »
    Hello,
    I have an interesting project. I have a need to test the reactance and saturating current for some open core solenoids. I'd like this piece of equipment to be capable of automating running sweeps at different DC current  levels, and measuring the reactance. Here's some rough specifications for the tester:
    • AC Frequency: 50 hz to 20khz
    • DC current: 0-10 A
    • AC current: 0-1 A
  • Approx range of inductance to tested: 1mH - 3H

To implement this I have a first pass at a design, and I'd like any feedback or suggestions to amend the design. Big picture overview of the design:
  • Programmable DC current source via current sense amp driving pass transistor. A DAC sets the voltage level, which is compared to FB from current sense amp.
  • AC current source from DAC controlling LT1210 buffer.
  • AC current source isolated from DC source via 470uF capacitor.
  • Two channel DAC used: LTC2758
  • LT2400 used to measure DC current level
  • AD7176x2 used to digitize AC voltage and current
  • a variable sized resistor is inserted into the AC current path , to measure AC current and phase angle across the DUT. Different size resistors switched in via relay. I expect using a resistor that is approximately on the same order of magnitude as the reactance of DUT will yield best measurements of phase angle
  • AD7176 high speed not necessary, but chosen as I'm using it in a future design, and wanted to get experience with
  • Raspberry Pi used to read ADCs and control DAC over SPI. I've used the Pi in the past, its easy and provides many options for UI

Images of schematics are below, which aren't the easiest to read. PDF of schematics is attached for easy examination. Thanks for any advice you can provide :)






« Last Edit: June 08, 2020, 01:29:45 am by Crossphased »
 

Offline duak

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Re: Review Design for Inductance Tester
« Reply #1 on: June 08, 2020, 05:03:44 am »
Hello Crossphased,

Have you tried breadboarding the basic configuration on the bench to see if it works?  What I think I see is that you are applying an AC current to the DUT and monitoring the voltage and from this, determining the DUT's inductance.  That should work.  What I think you might have trouble with is combining the bias current.  You have what look like two 0.12 H chokes to isolate the bias current driver output impedance from the DUT.  The bias current driver being a current source should have a relatively high output impedance by itself.    There will be a series circuit composed of L1, L2 and C1 across the DUT.  All of these components will have parasitic resistances, capacitances and inductances that may also have to be factored in.  In addition, unless L1 & L2 are air-cored, their inductances will also change as a function of the bias current as the core moves up and down its B-H curve.  In fact, why have C1?  It brings the bias driver's impedance down to a few ohms or less and negates a useful feature of a current source, ie. its hi-Z output?

Food for thought: since you have two current sources that are effectively in parallel driving the DUT, why not just vary the bias current by the AC and then from the voltage across the DUT determine the incremental inductance?  The bias current driver would need a current sink of 100 mA to a negative supply to ensure an AC current into the DUT when the bias current is zero.  You could dispense with the AC current source,  L1, L2 and C1 and a few other components and would not have to tease out the DUTs impedance from the combined impedance of the isolation network. Does this make sense?

Cheers,
« Last Edit: June 08, 2020, 05:19:20 am by duak »
 
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Offline Jay_Diddy_B

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Re: Review Design for Inductance Tester
« Reply #2 on: June 08, 2020, 06:31:15 am »
Hi,

To the OP take a look at this message I posted in another thread:

https://www.eevblog.com/forum/projects/arbitrary-(saturable)-coupled-inductors-in-ltspice/msg2505378/#msg2505378

I shared an LTspice simulation to measure the inductance versus bias current for a non-linear inductor. The approach is similar to your circuit.

Take a look at this thread:

https://www.eevblog.com/forum/projects/impedance-analyzer-build-and-experiments/msg2500275/#msg2500275

Forum member jaxbird builds an impedance analyzer around an Analog Discovery board.

and also look at this thread:

https://www.eevblog.com/forum/projects/inductor-saturation-tester-alternative-route-to-dump-the-excess-energy/msg181720/#msg181720

Here a voltage step is applied to the inductor and the current waveform is measured.

I would suggest that you simulate the circuitry around L1, L2 etc. to make sure that they do not interfere with the measurement.

Regards,
Jay_Diddy_B
 
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Offline CrossphasedTopic starter

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Re: Review Design for Inductance Tester
« Reply #3 on: June 08, 2020, 09:55:44 am »
Hi Duak,
Thank you for the advice. As far as the DC current source, yes I've breadboarded it, and it works very well. Very linear and good resolution. I haven't combined it with the AC current source yet however. You are quite correct about the two .12H chokes isolating the DC current source from the AC current. The idea being, the AC voltage amplitude will likely be larger than the DC voltage amplitude (with low resistance windings), so the chokes are intended to keep any AC from getting into the DC current source in the first place. If the AC supply stays out of the DC supply, then I wont be "measuring" the reactance of the DC supply. L1 & L2 are iron cored, but are rated for significant current. So long as AC stays out of the DC supply their varying inductance shouldn't have an effect right? I suppose I need chokes >> DUT for that. So you're right maybe those need to be nixed. Good call on getting rid of C1.

Your suggestion of distilling it to one current source definitely makes sense, but the DC bias is necessary in this application, as DUT will be carrying a significant DC bias current in its end use.

I very much appreciate your thoughts. Thank you and Cheers!
 

Offline CrossphasedTopic starter

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Re: Review Design for Inductance Tester
« Reply #4 on: June 08, 2020, 09:57:53 am »
Great thanks for the references Jay, I'm having a look now.
 

Offline Kleinstein

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Re: Review Design for Inductance Tester
« Reply #5 on: June 08, 2020, 03:56:18 pm »
The current sources are effectively parallel. The small inductor would not provide very much isolation unless they are larger than the DUTs inductance by several orders of magnitude. So maybe a small effect with a low inductance DUT, but not with a higher inductance where the isolation would be critical.

So one would need the DC current source to be really high output impedance. This could be one of the critical point in the whole design. As the 2 sources are effectively in parallel the DC current source would need to be effectively as fast as the AC part.

For the DC current source I would consider the measuring shunt on the ground side of the DUT and use differential measurement of the voltage. The drop at the shunt is usually small and thus less common mode voltage.
One would likely have the option to get the voltage reading from an isolated 2 nd winding at the DUT.


For a first test I would consider a smaller version with less current and simpler DAC/ADC.
 

Offline Jay_Diddy_B

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Re: Review Design for Inductance Tester
« Reply #6 on: June 08, 2020, 05:25:54 pm »
Hi,

I would suggest trying some simple LTspice models:




I think that you will find that it is going to very difficult to get large AC current on these inductors:



This shows the RMS voltage required to get a 1A rms ac current for different inductors versus frequency.

I have attached the model.

Regards,

Jay_Diddy_B

* inductor sweep.asc (0.5 kB - downloaded 30 times.)
 

Offline duak

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Re: Review Design for Inductance Tester
« Reply #7 on: June 08, 2020, 06:02:20 pm »
Crossphased, I think you misunderstood what I wrote.  You keep the 0 - 10 A bias driver and superimpose the AC excitatation on its input command signal.  Because the bias driver is single ended or monopolar, you'll need some circuitry to ensure that the AC excitation is not distorted or clipped at zero current so just add a small constant sink to a negative supply.  You do not have to provide a bipolar 10 A bias source.

BTW, what you're trying to design is a Two Port Analyzer or Curve Tracer.  Here's a link to a series of articles on another design from an ex-Tektronix engineer: https://www.planetanalog.com/build-your-own-curve-tracer-part-1-introduction/  What I take away from this design is that the characteristics of the bias and excitation driver don't matter much as long as you can measure the instantaneous current through the DUT and the corresponding instantaneous voltage across it.   The sampling has to be as synchronous as possible to get an accurace phase relationship between the voltage and current.   All the rest, as they say, is DSP.
« Last Edit: June 08, 2020, 06:05:26 pm by duak »
 

Offline Jay_Diddy_B

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Re: Review Design for Inductance Tester
« Reply #8 on: June 08, 2020, 06:34:11 pm »
Crossphased, I think you misunderstood what I wrote.  You keep the 0 - 10 A bias driver and superimpose the AC excitatation on its input command signal.  Because the bias driver is single ended or monopolar, you'll need some circuitry to ensure that the AC excitation is not distorted or clipped at zero current so just add a small constant sink to a negative supply.  You do not have to provide a bipolar 10 A bias source.




There are some advantages to keeping the bias source and the ac excitation source separate, and separating them with an inductor.

Consider his model:



The bias generator is low voltage, high current and unipolar.

The AC excitation source is high voltage, low current and bipolar. (High power dissipation)

If you combine the two you need high voltage, high current and bipolar. But you don't need the inductor.

I think the best way to test high power inductors is to apply a step voltage source and measure the current.

V= L di/dt

L = V / (di/dt)

So you determine how the inductance changes with current.

Jay_Diddy_B
 

Offline duak

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Re: Review Design for Inductance Tester
« Reply #9 on: June 08, 2020, 09:37:17 pm »
Jay, I agree with you in determining the inductance by applying a voltage while sampling and then reducing the data in the time domain. 

About whether one or two current drivers are needed depends on the AC excitation voltage - good point.  If it is higher than the compliance voltage range of the bias current driver then an  isolating choke is needed.  Even so, the effect of this AC on the bias current driver will also have to be considered if it exceeds the compliance range so C1 could very well be required.  BTW, a 0.14 H inductor capable of 10 A DC is a non-trivial assembly of steel and copper.  How big and heavy is one?  I have a 2.5 mH, 30 A choke behind me now that's about 15 cm a side.

BTW, I had overlooked that the OP wants a 1 A AC excitation current.  A 3 H inductor will have a reactance of 377 kohms at 20 kHz.  With an AC excitation current of 1 A, the voltage would be 377 kV.  Mind you, the isolating inductors would hold this down but it would still be in the kV range.  Clearly, some operating combinations will not be possible without heroic engineering.  Such are the pitfalls of deaiing with inductors.
 

Offline ace1903

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Re: Review Design for Inductance Tester
« Reply #10 on: June 09, 2020, 06:37:14 am »
I would like to thanks all of you for very informative comments from which I learned a lot about analog design.
My main expertise is in embedded software\hardware design and I will comment on choice of Raspberry Pi as main controller.
It is impossible to generate precisely timed SPI data stream on platform that has GUI and operating system.
DAC signal generation and ADC sampling needs to be precisely timed in order measurements to make sense.
Even 20KHz doesn't sound as high frequency, my experience is that with Raspberry Pi with even specially modified Linux kernels
it is impossible to get something useful.
This kind of project is for FPGA driven design. Even it doesn't look complicated my estimation is that only for FPGA one will need to spend something like 6 months development.
As compromise I would recommend considering some STM32 F7\H7 board as main controller.
For 20KHz it will be possible using timers to trigger SPI DMAs to get data that can be processed to get accurate measurements.
Using TouchGFX one can make nice GUI , or using ethernet to send data to Raspberry PI to be processed.
 

Offline JohnPi

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Re: Review Design for Inductance Tester
« Reply #11 on: June 09, 2020, 09:57:11 pm »
If the inductance changes with bias, the equation is NOT
V = L.di/dt,
but
V = d(L.i)/dt = L.di/dt + i.dL/dt.

Now, dL/dt is dL/di.di/dt (chain rule), so you get:

V = L.di/dt + i.dL/di(di/dt = (L+i.dL/di)*di/dt

You can still extract L, but it's somewhat more complex
« Last Edit: June 10, 2020, 03:52:22 pm by JohnPi »
 

Offline JohnPi

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Re: Review Design for Inductance Tester
« Reply #12 on: June 09, 2020, 10:02:36 pm »
Your DC current source is really a voltage source (emitter follower), with a feedback loop used to increase the output impedance. At frequencies where the loop BW is low, it won't work so well.

I'd suggest changing to a PMOS power transistor, sense current in the source, and drive the gate. This way, as loop BW falls, you'll remain as a current source (e.g. a PMOS device with a fixed gate V will act like a current source). A secondary benefit is won't need so much loop gain in the 1st place.

Note that if you actually measure the actual DUT I & V, you don't really care how good the current source is; it's the ratio of V & I that really matters. I didn't read all your schematic to see if that's what you are doing.

It is good and important that you have the diode across the DUT -- if the system was ever to reset, you'd have a huge amount of energy stored in the DUT and would likely blow up your box !
 

Offline Jay_Diddy_B

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Re: Review Design for Inductance Tester
« Reply #13 on: June 10, 2020, 01:09:31 am »
Hi,
we can use LTspice to get an idea of the difference between the two methods:

Method 1

A bias current and a small signal ac current

The ac current has to be small relative to the bias current.

Method 2

A step voltage source and calculating the inductance.

Modelling


The Chan Core model is used. The core is a ferrite toroid with a gap and typical power material.
A winding of 10 turns is placed on the core.
The winding has 0 \$\Omega\$ resistance
The nominal inductance is 8uH

Method 1




The bias current is swept from 0 to 30A in 0.25A step
A 1mA RMS 100kHz is also applied.
The inductance is calculated from the ac voltage on the inductor




Transient Method




A 1V step is applied to the inductor and the current is differentiated.




Observations

There is a difference between the results, as expected. But the difference is small compared to normal inductor tolerances.

These tolerance include, but not limited to:

Mechanical tolerance of the air gap.
Variation in material composition
Change in Bsat with temperature.

If you read inductor datasheets, saturation current is typically defined as the bias current when the inductance changes by 30%

Depending on the originally poster's application the transient method may be suitable.

Models attached.

Regards,
Jay_Diddy_B

* gapped ferrite toroid bias test.asc (4.16 kB - downloaded 39 times.)
* gapped ferrite toroid transient.asc (4.39 kB - downloaded 29 times.)

 


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