DIY IVD RBC project

[bobAk]

According to p327.  Here the principle is the same, only the approach to demodulation and the operation of the DC amplifier is different.  The picture shows only one transformer, in reality there are two.  The other one is on the back of the board.  Under the aluminum "cans", from right to left, there are an idn modulator and an idn demodulator (+ amplifier modulator).  On the block diagram, the section of the demodulator idn and the modulator of the dc amplifier are depicted in a simplified way, there are three transistors.

[Sengcid]

The p3017 transformer is not single-stage (if I understand correctly what is meant)...etc

In this context a "single-stage" transformer has one high permeability toroidal core.
A "two-stage" IVD has two. See attached for an example.
A three-stage transformer has three, not including smaller "equalising" cores.

[bobAk]

Then I understood correctly.  Two-stage transformer, wherein the second and third transformers are made in almost the same way, depending on which verification or measurement unit, so they differ quite significantly from each other in the structure of the transformers. In the photo in your post is a homemade transformer?

[Sengcid]

Two-stage means two cores per transformer. The two-stage IVD pictured was a prototype but proved to be be < 0.1ppm (in-phase) at 375Hz. I used it as a simple variable AC source when testing (@ 75Hz) the linearity of the ASL F17 prototype synchronous rectifiers and carrier generator circuits (sorry, original evidence lost - it was in 1978). The result was as good as our best DVM (Datron) at a few ppm. Herewith some reading for colleagues new to this area of metrology.

The full set of monographs can be found via the link.

https://drive.google.com/folderview?id=1TbomXeoBbIe-IVADaOOmyyLH9le-3wAt

Meanwhile there is a potential customer for a two-stage DIY IVD RBC over in the thread ASL F17 and F700 circuits.

[bobAk]

I understand that and that's what I meant.  I didn't explain the design very clearly.. Thanks for the documents, let's compare with our approaches and calculations.

[Sengcid]

Herewith an updated document to be more relevant to the Datron “Selfcal” type VREF multiplier application. The main conclusion is that the resistance on the input side (analogue switch) reduces the transformer time constant and, therefore, the amount of voltage droop. The resistance on the output side determines the voltage (average and ripple) on the capacitor. The technique is not intended to be accurate but stable - an alternative to precision resistors, probably requiring temperature control and periodic calibration. It must have required a lot of R&D to achieve the target spec.

Also of interest here is the Datron (single-stage) transformer. The primary winding (centre tapped with balanced drive) is almost certainly wound uniformly NNL (no-net-loop), not only to avoid transmitting flux axially but also to minimise capacitive coupling to the secondary. Each strand of wire is right next to the strand with equal but opposite voltage on it. The same is recommended with a two-stage transformer though each primary (energising and ratio) would need its own (low resistance) analogue switch.

Herewith, also, is another example of RT construction: the ASL F25.

[bobAk]

A two-winding(two winding primary) transformer is inconvenient in this case and does not solve the capacitance problem, better results with electrostatic shielding.  It is impossible to obtain a uniform remagnetization of the core, and the greater the resistance of the key, the more problems, and also for a small resistance of the key, a certain balance is needed.  The circuit at the output of the transformer pulse loads idv since the sample-hold occurs on one clock cycle.  This can be partially compensated.

[Sengcid]

Herewith another (quite nice) example of RT construction. The CMOS switches used to select the variable turns are on the underside. They are the 74HC version of the CD4051, hence the +/- 5V supplies.

The connections labelled EW_S and EW_F (start and finish) could be misleading - they are the primary  winding (single stage) and not the energising winding of a two-stage transformer. The extra toroidal core is for the equalisation of the second rope to the main one.

The F252 is a later version of the F25.
 
Also, a small correction to the square wave response. Does anyone know the frequency of the Datron selfcal system?

[Kleinstein]

Looking at the circuit the clock for the Datron circuit should be a little under 1 kHz ( 4.9152 MHz / 5000).

[Sengcid]

Looking at the circuit the clock for the Datron circuit should be a little under 1 kHz ( 4.9152 MHz / 5000).

Very interesting. Capacitance (between strands of the secondary rope), dielectric loss factor and leakage inductance are an issue - the rope must be very tightly wound (capacitance and leakage inductance combine to create in-phase error - similarly in the time domain analysis). Capacitance between primary and secondary is much less important.

Edit: I found the service manual and circuit diagrams via xdevs.

https://xdevs.com/fix/d1281/

Meanwhile I found this: the (expensive) competitor to a DIY IVD RBC

[Sengcid]

From the xdevs 1281 repair thread is a nice pic of the selfcal xformer. The taps are brought out and terminated on the PCB as single wires rather than twisted pairs - not recommended. One could easily pick up the stray flux from the primary winding connections with a simple search coil (10 turns wrapped with cotton thread and coated with nail varnish - an essential bit of kit for nanovolt hunters) plus a x100 amplifier.