Thanks for the update.
There are a lot of innovation going on your project. From analogue technique to power eletronics and then the digital bleeding edge technologies. Are you using STM32U5 DMA Low-power background autonomous mode? Are you using STM32U585 SMPS or just use external dc-dc- cuk's
Send me a PM if you need help with STM U585 setting
Thank you. I may need to take you up on that. I actually mislabeled the schematic and am using the STM32U575RIT (not Q), which just uses an LDO for the core voltage. Simply using a low power MCU at a low voltage helps a lot with power consumption (and, importantly, fed with a buck regulator). Once I get some minimal code going, I may work on implementing some of the fancier low power modes. I have attached the revised schematic for the PSU daughterboard. The 2V0 rail feeds TPS7A20s to make the two 1V8 rails. The Cuk is only for the negative rail as I have found they are often difficult to compensate at very low current draw.
I am going through the debugging process to make sure the various peripherals are up and running on a separate board with just the MCU and associated components. I am really still in the stages of learning as I go with coding some of this stuff, and the way it is currently set up is fairly basic with a handful of interrupts and GPDMA for the octospi bus that receives data from the AD4032. I am not aware of any good bare metal code examples for this series that goes beyond blinking a LED, which I can handle fine on my own. Right now I have all the timers working as planned, which was the most complex part of planning out the code so far. There are separate 32 bit GP timers for the modulator, the demodulator, the ADC CDS routine, and the settling delay between switching phases before beginning ADC conversions. The CNV pin is pulsed in one shot mode using one of the advanced timers (TIM8) for the repetition counter, and the falling edge of the BUSY signal on EXTI0 triggers the data read. With all the peripherals running and SYSCLK at 48 MHz, the oscillators and MCU pull about 10 mA, so that is 20 mW, which I don't think will be a big problem as it is a small portion of the overall power consumption.
I am interested to see if the response time to an external interrupt is better for the M33 than it is for the M4. With the F446 at 180 MHz, the best I could do was 160 ns between the falling edge of BUSY from the ADC and the falling edge of NCS from the MCU, though in that case I did not have hardware control of NCS, so it took a couple cycles to write the appropriate GPIO register. There is probably a better way to do this, but triggering ADC data reads with the falling edge of BUSY is probably the easiest way to code it. At 2MSPS with the Q- or OSCTOSPI clock at 90 MHz and 4 lanes, you need to be at or below 100 ns to get within the available window of 198 ns with a bit of margin. At 500 kSPS, I have a much more leisurely 1.2 us, so this naive way of structuring the transfer will probably work.
Hello,
where comes the heater supply from?
with 10V (+7.5 / -2.5) you are in a area where the PSRR is worse than 1 ppm/V.
Ideal would be something around 25-26 V for the heater.
https://www.eevblog.com/forum/metrology/adr1399-reference/msg4503037/#msg4503037
with best regards
Andreas
I was not aware of that rather poor heater PSRR. As I currently have it, the heater gets the battery voltage for the positive supply and the Cuk output (-3V3) for the negative. In theory that would be 20V at full charge to about 15V with the cell voltages at their cutoff of 2.9V. Obviously, if that 1 ppm/V is a general phenomenon, this would be a big issue, but I could address it with another converter on the power supply at the expense of no longer being able to monitor the battery voltage with the MCU ADC. I don't mind this too much since I will already be doing a revision of the PSU. I will check the PSRR with my setup and report back. Thank you for bringing this effect to my attention.
The low side of the ADR1399 reference looks a bit odd. There is the rather low resistor to "measure" the current, but essentially all of the current would still come via the transistor.
I have not seen this part in the initial circuit and it is now likely too late for a larger change. A more logical solulution here might have been to have the 7 V reference split as +5 V and -2 V. So that the high side could directly be at the 5 V ref. out level and the -2 V level could be controlled be the "gain" stage to get -2/5 of the high side. So with no direct ground link for the refrence. One would get a little more headroom to control the current from an auxiliary level of some +7 V.
For the protection against fast transients some series inductance could help. It would still let some current through, but the current is at least reduced and as a side effect one gets some EMI filtering.
Yeah, that probably would have been better. I have quite a bit of experience using that ground current cancellation technique in ADR1000 and LTZ1000-based reference modules for ensuring that the low sense voltage remains near power ground with potentially variable contact resistance on the header, and it works well for that purpose. With the OPA2205A, things usually settle out to a few tens of uA ground current. It is nice to have a low current sense resistor because it changes the cutoff frequency for op amp noise. With the values here it is only about 4 Hz. So it may not be ideal, but it does work, and you have to admit that the current source for the Zener is pretty cute.
I agree some series inductance would help. With all the beads in series, I think it should be around 2.4 uH right now, which is not much. I am wary of adding too much given my experiences with degrading the phase margin of composite amps with a large input capacitance, especially since the autozeroing with this is predicated on the discrete portion operating at very high gain (from simulations, it is about 70 dB), which means the loop gain is quite high even with a large divider in the feedback network. That said, I can experiment pretty easily by just adding ferrite beads to the input leads or adding turns to said ferrite beads. I was thinking about trying out Toshiba's Amobeads for this purpose along with more traditional cable ferrites.